Design & Reuse
89 IP
1
100.0
1-56/112G Multi-protocol Serdes (Interlaken, JESD204, CPRI, Ethernet, OIF/CEI)
eTopus designs ultra-high speed mixed-signal semiconductor IP solutions for high-performance computing and data center applications. Our 1-56/112Gbps ...
2
100.0
400G ultra low latency 56/112G FEC and SERDES IP sub 10ns latency
...
3
100.0
56G Serdes in 7nm bundled with PCie Gen 5 controller IP
New IP for value conscious designers....
4
100.0
PCIe Gen 6 SERDES IP - supports up to 112G LR ethernet with low power and latency
Multiprotocol low latency, low power SERDES IP....
5
100.0
Low-Latency SerDes PMA - 10GbE, 25GbE
Best(lowest)-in-class latency 10GbE/25GbE SerDes PMA....
6
100.0
TSMC FPD-Link / OpenLDI / LVDS forwarded clock SERDES Link
Universal LVDS-based interfaces supporting variety of Tx and Rx configurations....
7
100.0
Multi-protocol SerDes PMA - PCIe1 PCIe2 PCIe3 PCIe4 PCIe5 and more
Multiprotocol SerDes PMA supporting variety of interfaces....
8
100.0
Multi-protocol SerDes PMA in FDSOI (GF22FDX FDX 22FDX) - PCIe1 PCIe2 PCIe3 PCIe4 and more
Multiprotocol SerDes PMA supporting variety of interfaces....
9
50.0
32G Multi Rate SerDes PHY - GlobalFoundries 22FDX
Extoll’s SerDes architecture is based on digital design elements and methodologies. Plain analog blocks are only used where absolutely necessary. Vari...
10
45.0
32G Multi Rate Long Reach SerDes PHY - GlobalFoundries 12LP and 12LPP
Extoll’s SerDes architecture is based on digital design elements and methodologies. Plain analog blocks are only used where absolutely necessary. Vari...
11
45.0
32G Multi Rate Very Short Reach SerDes PHY - GlobalFoundries 12LP and 12LPP
Extoll’s SerDes architecture is based on digital design elements and methodologies. Plain analog blocks are only used where absolutely necessary. Vari...
12
38.0
1-112Gbps Integrated Laser Driver and Optical SerDes
OptiCORE includes all of the features of the AlphaCORE electrical SerDes (low-power high-speed ADC, sub-sampling clock multiplier (SSCM), powerful DSP...
13
38.0
1-112Gbps Long-Reach (LR) Multi-Standard-Serdes (MSS)
The AlphaCORE Long-Reach (LR) Multi-Standard-Serdes (MSS) IP is a high-performance, low-power, DSP-based PHY. It is a highly configurable IP that supp...
14
38.0
1-112Gbps Medium Reach (MR) and Very Short Reach (VSR) SerDes
The AppolloCORE(MR/VSR) Multi-Standard-Serdes (MSS) IP is optimized for Medium Reach (MR) and Very Short Reach (VSR) applications. It is a highly conf...
15
38.0
Xtra-Long-Reach (XLR) Multi-Standard-Serdes (MSS)
The ZeusCORE Xtra-Long-Reach (XLR) Multi-Standard-Serdes (MSS) IP is the highest performance SerDes in the Alphawave IP product portfolio. It is a hig...
16
20.0
112Gbps Serdes USR & XSR
With sophisticated architecture and advanced technology, KNL multi-mode D2D transceiver IP with PMA and PCS layer is designed for low power and high p...
17
20.0
64G SerDes
The KNiulink 64G SerDes IP core supports PAM4 signaling in the range of 25.0 - 64.0 Gbps using full-rate and half-rate modes with scrambled data. Non-...
18
20.0
Combo SerDes PHY
With sophisticated architecture and advanced technology, KNiulink multi-mode transceiver IP with PMA and PCS layer is designed for low power and high ...
19
20.0
TSMC 12nm 16Gbps SerDes IP supporting multiple serial protocols
A high-performance, low-power 16Gbps SerDes IP supporting multiple serial protocols. Integrated PMA and PCS layers with advanced equalization and diag...
20
10.0
1-10G Low Power SERDES - TSMC 40G
Analog Bits Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports multi-protoc...
21
10.0
1-15G SERDES PCIe3/HMC SERDES PHY - TSMC 16FF+GL
Analog Bits Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports multi-protoc...
22
10.0
PCI Express GEN 3/4 Port SERDES PHY - Samsung 7LPP
Analog Bits Programmable SERDES provides a Physical Media Attachment (PMA) Layer and synthesizable Physical Coding Sublayer (PCS). The integrated PHY ...
23
10.0
PCI Express GEN 4/5 Port SERDES PHY - Samsung 8LPP
Analog Bits Programmable SERDES provides a Physical Media Attachment (PMA) Layer and synthesizable Physical Coding Sublayer (PCS). The integrated PHY ...
24
10.0
PCI Express GEN-3/Display Port SERDES PHY - Samsung 28 28LPP
Analog Bits Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports multi-protoc...
25
10.0
PCI Express GEN-3/SATA3 SERDES PHY - Samsung 28 28FDSOI
Analog Bits Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports multi-protoc...
26
10.0
PCIe4 Ethernet SERDES PHY - TSMC N5
Analog Bits’ Programmable SERDES provides a Physical Media Attachment (PMA) Layer and synthesizable Physical Coding Sublayer (PCS). The integrated PHY...
27
10.0
Low Power PCIe2/SATA3SERDES PHY - TSMC 28HPC
Analog Bits Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports multi-protoc...
28
10.0
Low Power PCIe3 SERDES PHY - TSMC 40G
Analog Bits Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports multi-protoc...
29
10.0
Low Power PCIe3/SATA3 SERDES PHY - TSMC 12FFC
Analog Bits Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports multi-protoc...
30
10.0
Low Power PCIe3/SATA3 SERDES PHY - TSMC 16FFC
Analog Bits Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports multi-protoc...
31
10.0
Low Power PCIe3/SATA3SERDES PHY - TSMC 28HPC+
Analog Bits Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports multi-protoc...
32
10.0
Multi-protocol, Low Power Serdes - TSMC 28 CLN28HPL
Analog Bits Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports multi-protoc...
33
5.0
SerDes Hard Macro-IP in GlobalFoundries 22FDX
Low-power, flexible and robust Serializer-de-serializer IP built upon a proven ring-PLL based architecture, Support for multiple protocols, as well a...
34
3.0
112Gb/s PAM4 SERDES PHY (14nm)
The Ethernet PHY IP is used for CEI-112G applications and serializes 8b/10b encoded data for Gen1 and Gen2, as well as 128b/130b encoded data for Gen3...
35
3.0
Multi-Link Multi-Protocol SerDes 10Gbps in GF 28SLP
Terminus Circuits offers low power, low latency Multistandard SerDes in TSMC 28nm process node to support wide range of standards like PCI Express, SA...
36
3.0
Multi-Link Multi-Protocol SerDes 10Gbps in TSMC 55LP
Terminus Circuits offers low power, low latency Multistandard SerDes in TSMC 28nm process node to support wide range of standards like PCI Express, SA...
37
3.0
Multi-Link Multi-Protocol SerDes 10Gbps in TSMC 65GP
Terminus Circuits offers low power, low latency Multistandard SerDes in TSMC 28nm process node to support wide range of standards like PCI Express, SA...
38
3.0
Multi-Link Multi-Protocol SerDes 16Gbps in TSMC 28HPC
Terminus Circuits offers low power, low latency Multistandard SerDes in TSMC 28nm process node to support wide range of standards like PCI Express, SA...
39
2.0
56G SerDes Ethernet
56G SerDes IP core supports PAM4 signaling in the range of 25.0-60.0 Gbps using full-rate and half-rate modes with scrambled data. Non-return-to-zero ...
40
1.0
10G Multi-SerDes PHY
The Innosilicon 10G SERDES PHY is a highly configurable PHY capable of supporting speeds up to 10Gbps within a single lane. The PHY can be configured ...
41
1.0
12.5G Multi-SerDes PHY
The Innosilicon 12.5G SERDES PHY is a highly configurable PHY capable of supporting speeds up to 12.5Gbps within a single lane. For this particular da...
42
1.0
32G Multi-SerDes For PCIe5.0/USB3.x PHY
The Innosilicon 32G SERDES PHY is a highly configurable PHY capable of supporting speeds up to 32Gbps within a single lane. For this datasheet, the PH...
43
1.0
32G Multi-SerDes PHY + Controller
The INNOSILICON™ 32G Multi-SerDes PHY is a highly configurable IP solution capable of supporting data rates of up to 32 Gbps per lane. It is designed ...
44
1.0
64G/56G SerDes
The Innosilicon 64G/56G SERDES PHY is a highly configurable PHY capable of supporting speeds up to 56Gbps within a single lane. For this datasheet, th...
45
1.0
25G Multi-SerDes PHY
The Innosilicon 25G SERDES PHY is a highly configurable PHY capable of supporting speeds up to 25Gbps within a single lane. For this particular datash...
46
1.0
Serdes - SMIC 55nm Eflash
...
47
1.0
5G Multi-SerDes For PCIe2.0/USB3.0 PHY
The Innosilicon 5Gbps SERDES PHY is a highly configurable PHY capable of supporting speeds up to 5Gbps within a single lane. For this datasheet, the P...
48
1.0
8G Multi-SerDes For PCIe3.0/USB3.0 PHY
The Innosilicon 8Gbps SERDES PHY is a highly configurable PHY capable of supporting speeds up to 8Gbps within a single lane. For this datasheet, the P...
49
0.0
1-56G-PCIe Gen5 ePHY Multi-Protocol SerDes IP - 7nm Low Power and Latency
Ultra-high speed SerDes IP, adopted by global Tier-1 network/storage/5G OEMs and major semiconductor companies. eTopus is the pioneer on PAN4 ADC/DSP...
50
0.0
6.25G SerDes in 55nm
The Actt's 6.25G SerDes IP is a 4-Channel Serdes configuration with 1 PLL, 4 TX channels and 4 RX channels. It’s based on SMIC 55nm embedded-flash tec...