Design & Reuse
Catalog of SIP Cores
System on Chip design resources
106 IP
101
0.0
ASA-ML Serdes IP Core in 28nm
The ASA PHY IP Core in 28nm provides scalable and robust SerDes connectivity for advanced automotive SoCs. Supporting the Automotive SerDes Alliance s...
102
0.0
TSMC 12FFC Lane-based 1.25 - 22.5 Gbps Enterprise Multi-Standard SerDes
The GUC's EMS-PHY SerDes supports multiple high speed wire-line communication standards. Supported standards include PCIe Gen1-Gen4, SAS-4 G1-G5 and a...
103
0.0
TSMC CLN12FFC Lane-based 1.5 - 16 Gbps Enterprise Multi-Standard SerDes
The GUC's EMS-PHY SerDes supports multiple high speed wire-line communication standards. Supported standards include PCIe Gen1-Gen4,SAS-3 G1-G4, SATA-...
104
0.0
TSMC CLN28HPC+ Derivative IP of IGASERT06A Enterprise Multi-Standard SerDes
The GUC's Quad-Lane EMS-XT PHY SerDes supports multiple high speed wire-line communication standards. Supported standards include CEI-28G-VSR, CEI-25G...
105
0.0
TSMC CLN7FF Lane-based 1.5 – 22.5 Gbps Enterprise Multi-Standard SerDes
The GUC's EMS-PHY SerDes supports multiple high speed wire-line communication standards. Supported standards include PCIe Gen1-Gen4, SAS-4 G1-G5 and a...
106
0.0
TSMC N7FF 25.78125Gbps Enterprise SerDes
The receiver equalizes and recovers incoming serial data and de-serializes the data stream into selectable 32/40/64 bit-wide data bus. The transmitter...