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Browse Interface Controller & PHY
AMBA AHB / APB/ AXI (186)
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412 IP
351
0.0
USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in UMC 55SP/EF
The combination PHY consists of a Serial ATA (SATA) conforming with the SATA 3.0 Specification, a Peripheral Component Interconnect Express (PCIe) com...
352
0.0
USB 3.0/ PCIe 3.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SAM 8LPP
The unified PHY complies with the USB, USB 3.0, Serial ATA, Peripheral Component Interconnect Express (PCIe), and USB 2.0 interface protocols (USB Hig...
353
0.0
USB 3.1 Device Controller
Mature solutions featuring xHCI Host, Device, and Dual-Role Certified for compliance with USB 3.1 Specification v1.0, and xHCI Specification v1.0, ...
354
0.0
USB 3.1 Gen1 / Gen2 Device Controller IP
USB 3.1 Device controller is a highly configurable core and implements the USB 3.1 Device functionality that can be interfaced with third party USB 3....
355
0.0
USB 3.1 Gen1 / Gen2 Host Controller IP
USB 3.1 Host Controller is compliance with USB3.1 specification, Revision 1.0 and all associated ECN’s, USB specifications Rev 2.0 and all associated ...
356
0.0
USB 3.1 Gen1/Gen2 PHY IP, Silicon Proven in SMIC 14SF+
With this PHY IP, it supports both USB 3.1 Gen1 and Gen2. By providing an integrated self-test module, a whole on-chip physical transceiver solution w...
357
0.0
USB 3.1 Gen1/Gen2 PHY IP, Silicon Proven in UMC 28HPC
It supports both USB 3.1 Gen1 and Gen2 with this PHY IP. By offering a complete on-chip physical transceiver solution with built-in jitter injection, ...
358
0.0
USB 3.1 Type-C PHY IP, Silicon Proven in SMIC 12SF++
A high performance, high-speed SERDES IP known as USB3.1Type-C PHY was created for semiconductors that allow high bandwidth data transfers while using...
359
0.0
USB 3.1 Type-C PHY IP, Silicon Proven in SMIC 14SF+
The USB3.1Type-C PHY is a high-performance, high-speed SERDES IP designed for semiconductors that support low-power, high-bandwidth data transfers. Th...
360
0.0
USB 3.1 Type-C PHY IP, Silicon Proven in SMIC 55LL
The USB3.1Type-C PHY is a high-speed, SERDES IP with high performance that was created for semiconductors that allow high-bandwidth, low-power data tr...
361
0.0
USB 3.1 Type-C PHY IP, Silicon Proven in TSMC 55ULP
USB3.1Type-C PHY IP is a high performance high speed SERDES IP designed for chips that perform high bandwidth data communication while operating at lo...
362
0.0
USB 3.2 Gen1/Gen2 PHY IP, Silicon Proven in TSMC 28HPC+
This PHY IP supports both USB 3.1 Gen1 & Gen2. By providing a full on-chip physical transceiver solution with Electro Static Discharge (ESD) protectio...
363
0.0
USB 3.2 Gen2 PHY IP, Silicon Proven in TSMC 12FFC
All USB 3.2 Gen2X1 host and peripheral applications are supported up to 10Gbps by the USB 3.2 Gen2X1 transceiver IP. It complies with UTMI+ and PIPE4....
364
0.0
USB 3.2 Gen2 PHY IP, Silicon Proven in TSMC 16FFC
The USB 3.2 Gen2X1 transceiver IP supports all USB 3.2 Gen2X1 host and peripheral applications up to 10Gbps. It conforms with the standards of UTMI+ a...
365
0.0
USB 3.2 Gen2 PHY IP, Silicon Proven in TSMC 28HPC+
All USB 3.2 Gen2X1 host and peripheral applications up to 10Gbps are supported by the USB 3.2 Gen2X1 transceiver IP. It complies with UTMI+ and PIPE4....
366
0.0
USB 3.2 Gen2 PHY IP, Silicon Proven in TSMC 7FF
The USB 3.2 Gen2X1 transceiver IP offers all USB 3.2 Gen2X1 host and peripheral applications up to 10Gbps. Both the UTMI+ and PIPE4.0 specifications a...
367
0.0
USB 3.2 Gen2 PHY IP, Silicon Proven in UMC 28HPC
The USB 3.2 Gen2X1 transceiver IP supports all USB 3.2 Gen2X1 host and peripheral applications up to 10Gbps. It conforms with the standards of UTMI+ a...
368
0.0
USB 3.x PHY for Intel
Proven PHY IP for USB Device, Host, and DRD with small footprint and low active power The ubiquity of USB 3.x in devices makes it nearly mandatory ...
369
0.0
USB 3.x PHY for Samsung
Proven PHY IP for USB Device, Host, and DRD with small footprint and low active power The ubiquity of USB 3.x in devices makes it nearly mandatory ...
370
0.0
USB 3.x PHY for TSMC
Proven PHY IP for USB Device, Host, and DRD with small footprint and low active power The ubiquity of USB 3.x in devices makes it nearly mandatory ...
371
0.0
USB 4.0 V2 PHY - 4TX/2RX in TSMC (N3P)
The Synopsys USB4 IP solution is based on the USB4 specification from the USB Implementer Forum (USB-IF). The USB4 IP offering includes device router,...
372
0.0
USB BCK Technology (22nm, 40nm, 55nm, 110nm)
In USB product series, M31 not only provides customers with a standard USB PHY solution, but also offers a unique BCK function. M31’s patented BCK (Bu...
373
0.0
USB Super Speed+ PHY (4nm) SF4X
The USB PHY IP consists of a hard macro PMA and soft macro PCS compliant with USB 3.2 specification, supporting SuperSpeed+ (10 Gbps) operation. This ...
374
0.0
USB Type-C and Power deliver Controller
USB Type-C and Power deliver Controller...
375
0.0
USB-C 3.1 SS/SSP PHY, Type-C IP (Silicon proven in UMC 55SP/ EF)
A high performance, high-speed SERDES IP called USB3.1Type-C PHY is created for semiconductors that provide high bandwidth data connection while using...
376
0.0
USB-C 3.2 DP/TX PHY AR in TSMC (N3P)
The Synopsys USB-C 3.2/DisplayPort 1.4 IP solution consists of USB-C 3.2/DisplayPort 1.4 PHYs, USB-C 3.2/DisplayPort 1.4 controllers (Device, Host, or...
377
0.0
USB1.1 PHY in SMIC 55PFULP
Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...
378
0.0
USB2 - DUSB2 - USB 2.0 Device Controller
The DUSB2 is hardware implementation of full/high-speed peripheral controller that interfaces to the UTMI bus transceiver. The DUSB2 contains the USB ...
379
0.0
USB2 - DUSB2-ULPI - USB 2.0 Device Controller with ULPI interface
The DUSB2-ULPI is a hardware implementation of a full/high-speed peripheral controller that interfaces to an ULPI bus transceiver. The DUSB2-ULPI cont...
380
0.0
USB2 Device Controller
The Synopsys USB 2.0 Device Controller enables ASIC/FPGA designers to implement a complete USB 2.0 Device interface. The USB 2.0 Device supports USB H...
381
0.0
USB2.0 OTG IP
This IP is developed as the USB2.0 OTG PHY. This PHY consists of an analog PHY and a PCS layer. The PCS section includes basic encoding and decoding a...
382
0.0
USB2.0 OTG PHY in SMIC 0.11G
Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...
383
0.0
USB2.0 OTG PHY in SMIC 0.13EF
Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...
384
0.0
USB2.0 OTG PHY in SMIC 0.13G
Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...
385
0.0
USB2.0 OTG PHY in SMIC 28HKC+
Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...
386
0.0
USB2.0 OTG PHY in SMIC 28HKD 0.9/1.8V
Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...
387
0.0
USB2.0 OTG PHY in SMIC 28HKD 0.9/2.5V
Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...
388
0.0
USB2.0 OTG PHY in SMIC 40NEF
Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...
389
0.0
USB2.0 OTG PHY in SMIC 40NLL
Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...
390
0.0
USB2.0 OTG PHY in SMIC 55EF
Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...
391
0.0
USB2.0 OTG PHY in SMIC 55NLL
Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...
392
0.0
USB3.2 PHY on Samsung S8LPU
This IP is a USB 3.2 Gen2x2 PHY IP which provides a complete range of USB 3.2 Gen2 host and peripheral applications up to 20Gbps. The USB 3.2 Gen2x2 I...
393
0.0
USB3.2 PHY on Samsung SF4X
This IP is a USB 3.2 Gen2x2 PHY IP which provides a complete range of USB 3.2 Gen2 host and peripheral applications up to 20Gbps. The USB 3.2 Gen2x2 I...
394
0.0
USB4 PHY - SS SF2, North/South Poly Orientation
The Synopsys USB4 IP solution is based on the USB4 specification from the USB Implementer Forum (USB-IF). The USB4 IP offering includes device router,...
395
0.0
USB4 PHY IP for TSMC N3E
The Synopsys USB4 IP solution is based on the USB4 specification from the USB Implementer Forum (USB-IF). The USB4 IP offering includes device router,...
396
0.0
USB4 v2.0 Verification IP
Truechip's USB4 Verification IP provides an effective & efficient way to verify the components interfacing with USB4 interface of an IP or SoC, Truech...
397
0.0
HSIC PHY
The Innosilicon HSIC PHY is fully compliant with the High-Speed Inter-Chip Supplement to the USB 2.0 Specification. By stripping off all the legacy US...
398
0.0
OT9120 Simplified Integration Power Delivery Type-C Source IP
This OT9120 is an easy to integrate and configure Type-C source port with Power Delivery. It is delivered as RTL and an Analog Front End hard macro. N...
399
0.0
OT9121 Simplified Integration Power Delivery Type-C Source IP
This OT9121 is an easy to integrate and configure Type-C sink port with Power Delivery. It is delivered as RTL and an Analog Front End hard macro. No ...
400
0.0
Dual-Role Device Controller for USB 3.0
Mature solutions featuring xHCI Host, Device, and Dual-Role Certified for compliance with USB 3.0 Specification v1.0, and xHCI Specification v1.0, ...
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