Design & Reuse
13 IP
1
100.0
Complete USB Type-C Power Delivery PHY, RTL, and Software
The OTI9108 is a complete single transceiver front end for data USB PD Type-C (baseband) communications. It has a register interface which, with an MP...
2
50.0
USB 3.1 PHY (10G/5G) inTSMC (16nm, 12nm, N7, N6, N5,N3E, N3P)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum. The comprehensive USB 3.1 IP offerin...
3
14.0
Dual-Role Device Controller for USB 3.1
Mature solutions featuring xHCI Host, Device, and Dual-Role Certified for compliance with USB 3.1 Specification v1.0, and xHCI Specification v1.0, th...
4
10.0
USB 3.1 PHY (10G/5G) in Samsung (14nm, 11nm, 10nm, 8nm, SF5, SF5A, SF4E)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum. The comprehensive USB 3.1 IP offerin...
5
10.0
USB-C 3.1 SS/SSP PHY in Type-C in TSMC (16nm, 12nm, N7, N6, N5, N5A, N3A)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum. The comprehensive USB 3.1 IP offerin...
6
10.0
USB-C 3.1/DP TX PHY in Samsung (14nm, 11nm, 5nm)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum. The comprehensive USB 3.1 IP offerin...
7
10.0
USB-C 3.1/DP TX PHY in TSMC (16nm, 12nm, N7, N6)
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum. The comprehensive USB 3.1 IP offerin...
8
9.0
USB 10Gbps Device Controller
Leveraging the benefits of eUSB 3.0/3.1 Gen 1 device controller, eUSB 3.1 Gen 2 is designed using the FPGA built-in transceiver. It is a one-stop solu...
9
4.0
USB3.1 PHY
With sophisticated architecture and advanced technology, KNiulink USB3.1 transceiver IP with PMA and PCS layer is designed for low power and high perf...
10
0.118
28nm HPC USB3.1 gen2 PHY(10Gbps)
28nm HPC USB3.1 gen2 PHY(10Gbps)...
11
0.118
28nm HPC+ USB3.1 gen2 PHY(10Gbps)
28nm HPC+ USB3.1 gen2 PHY(10Gbps)...
12
0.0
USB 3.1 Gen1 / Gen2 Host Controller IP
USB 3.1 Host Controller is compliance with USB3.1 specification, Revision 1.0 and all associated ECN’s, USB specifications Rev 2.0 and all associated ...
13
0.0
USB 3.1 Type-C PHY IP, Silicon Proven in SMIC 55LL
The USB3.1Type-C PHY is a high-speed, SERDES IP with high performance that was created for semiconductors that allow high-bandwidth, low-power data tr...