Interface Controller - PHY IP / usb IP Core

It supports both USB 3.1 Gen1 and Gen2 with this PHY IP. By offering a complete on-chip physical transceiver solution with built-in jitter injection, ...

352

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USB 3.1 Type-C PHY IP, Silicon Proven in SMIC 12SF++

A high performance, high-speed SERDES IP known as USB3.1Type-C PHY was created for semiconductors that allow high bandwidth data transfers while using...

353

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USB 3.1 Type-C PHY IP, Silicon Proven in SMIC 14SF+

The USB3.1Type-C PHY is a high-performance, high-speed SERDES IP designed for semiconductors that support low-power, high-bandwidth data transfers. Th...

354

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USB 3.1 Type-C PHY IP, Silicon Proven in SMIC 55LL

The USB3.1Type-C PHY is a high-speed, SERDES IP with high performance that was created for semiconductors that allow high-bandwidth, low-power data tr...

355

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USB 3.1 Type-C PHY IP, Silicon Proven in TSMC 55ULP

USB3.1Type-C PHY IP is a high performance high speed SERDES IP designed for chips that perform high bandwidth data communication while operating at lo...

356

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USB 3.2 Gen2 PHY IP, Silicon Proven in TSMC 12FFC

All USB 3.2 Gen2X1 host and peripheral applications are supported up to 10Gbps by the USB 3.2 Gen2X1 transceiver IP. It complies with UTMI+ and PIPE4....

357

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USB 3.2 Gen2 PHY IP, Silicon Proven in TSMC 16FFC

The USB 3.2 Gen2X1 transceiver IP supports all USB 3.2 Gen2X1 host and peripheral applications up to 10Gbps. It conforms with the standards of UTMI+ a...

358

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USB 3.2 Gen2 PHY IP, Silicon Proven in TSMC 28HPC+

All USB 3.2 Gen2X1 host and peripheral applications up to 10Gbps are supported by the USB 3.2 Gen2X1 transceiver IP. It complies with UTMI+ and PIPE4....

359

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USB 3.2 Gen2 PHY IP, Silicon Proven in TSMC 7FF

The USB 3.2 Gen2X1 transceiver IP offers all USB 3.2 Gen2X1 host and peripheral applications up to 10Gbps. Both the UTMI+ and PIPE4.0 specifications a...

360

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USB 3.2 Gen2 PHY IP, Silicon Proven in UMC 28HPC

The USB 3.2 Gen2X1 transceiver IP supports all USB 3.2 Gen2X1 host and peripheral applications up to 10Gbps. It conforms with the standards of UTMI+ a...

361

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USB 3.x Device IP

USB 3.x Device interface provides full support for the USB3.x synchronous serial interface, compatible with USB 3.0/3.1/3.2 specification. Through its...

362

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USB 3.x Hub IP

USB 3.x HUB interface provides full support for the USB3.x synchronous serial interface, compatible with USB 3.0/3.1/3.2 specification. Through its US...

363

0.0

USB 3.x OTG IP

USB 3.x OTG interface provides full support for the USB3.x synchronous serial interface, compatible with USB 3.0/3.1/3.2 specification. Through its US...

364

0.0

USB 3.x PHY for TSMC

Proven PHY IP for USB Device, Host, and DRD with small footprint and low active power The ubiquity of USB 3.x in devices makes it nearly mandatory fo...

365

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USB BCK Technology (22nm, 40nm, 55nm, 110nm)

In USB product series, M31 not only provides customers with a standard USB PHY solution, but also offers a unique BCK function. M31’s patented BCK (Bu...

366

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USB PD IP

USB PD interface provides full support for the USB PD synchronous serial interface, compatible with USB 3.1/3.0/2.0 and 1.0 specifications. Through it...

367

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USB Type-C and Power deliver Controller

USB Type-C and Power deliver Controller...

368

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USB Type-C IP

USB TYPE C interface provides full support for the USB TYPE C synchronous serial interface, compatible with USB 3.0/2.0 and 1.0 specifications. Throug...

369

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USB-C 3.1 SS/SSP PHY, Type-C IP (Silicon proven in UMC 55SP/ EF)

A high performance, high-speed SERDES IP called USB3.1Type-C PHY is created for semiconductors that provide high bandwidth data connection while using...

370

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USB-C 3.2 DP/TX PHY AR in TSMC (N3P)

The Synopsys USB-C 3.2/DisplayPort 1.4 IP solution consists of USB-C 3.2/DisplayPort 1.4 PHYs, USB-C 3.2/DisplayPort 1.4 controllers (Device, Host, or...

371

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USB1.1 PHY in SMIC 55PFULP

Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...

372

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USB2.0 OTG IP

This IP is developed as the USB2.0 OTG PHY. This PHY consists of an analog PHY and a PCS layer. The PCS section includes basic encoding and decoding a...

373

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USB2.0 OTG PHY in SMIC 0.11G

Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...

374

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USB2.0 OTG PHY in SMIC 0.13EF

Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...

375

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USB2.0 OTG PHY in SMIC 0.13G

Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...

376

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USB2.0 OTG PHY in SMIC 28HKC+

Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...

377

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USB2.0 OTG PHY in SMIC 28HKD 0.9/1.8V

Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...

378

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USB2.0 OTG PHY in SMIC 28HKD 0.9/2.5V

Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...

379

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USB2.0 OTG PHY in SMIC 40NEF

Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...

380

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USB2.0 OTG PHY in SMIC 40NLL

Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...

381

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USB2.0 OTG PHY in SMIC 55EF

Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...

382

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USB2.0 OTG PHY in SMIC 55NLL

Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...

383

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USB3.x Host IP

USB3.x Host interface provides full support for the USB3.x synchronous serial interface, compatible with USB 3.0/3.1/3.2 specification. Through its US...

384

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USB4 PHY - SS SF2, North/South Poly Orientation

The Synopsys USB4 IP solution is based on the USB4 specification from the USB Implementer Forum (USB-IF). The USB4 IP offering includes device router,...

385

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USB4 PHY IP for TSMC N3E

The Synopsys USB4 IP solution is based on the USB4 specification from the USB Implementer Forum (USB-IF). The USB4 IP offering includes device router,...

386

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eUSB 2.0 PHY for TSMC N3A

Synopsys provides designers with silicon-proven, configurable eUSB2 PHYs that are compliant with the USB-Implementers Forum (USB-IF) eUSB2 and USB 2.0...

387

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eUSB 2.0 PHY in TSMC (N3A) for Automotive

Synopsys provides designers with silicon-proven, configurable eUSB2 PHYs that are compliant with the USB-Implementers Forum (USB-IF) eUSB2 and USB 2.0...

388

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eUSB2V2 PHY

Low voltage USB 2.0 supporting 4.8Gbps eUSB2V2 is primarily a performance enhancement to eUSB2 native mode to provide more bandwidth for peripherals,...