Company
design-reuse.com
D&R China
Blogs
Industry Articles
D&R Events
IP-SoC Days 2026
IP-SoC Days 2025
IP-SoC Days 2024
IP-SoC Days 2023
IP-SoC Days 2022
IP-SoC Days 2021
IP-SoC Days 2020
IP-SoC Days 2019
Videos
Subscribe to D&R SoC News Alert
English
Mandarin
Login
Catalog of SIP Cores
System on Chip design resources
Catalog of SIP Cores
System on Chip design resources
Menu
Home
Search IP Core
News
Blogs
Articles
D&R Events
Videos
Subscribe to D&R SoC News Alert
Login
News
Center
Foundation IP
Analog IP
Interface IP
Interconnect IP
Memory Controller & PHY
Peripheral Controller
Wireless IP
Wireline IP
Processor IP
RISC-V
AI Core
Automotive IP
Security IP
IoT
Media IP
Avionics / Space IP
Verification IP
Verification Platform
Design Platform
Asic & IP Design Center
IP-SoC Days
IP-SoC Days 2026
IP-SoC Days 2025
IP-SoC Days 2024
IP-SoC Days 2023
IP-SoC Days 2022
IP-SoC Days 2021
IP-SoC Days 2020
IP-SoC Days 2019
Browse Interface Controller & PHY
AMBA AHB / APB/ AXI (198)
CXL (20)
D2D (8)
Gen-Z (6)
HDMI (96)
I2C (97)
Interlaken (2)
MIL-STD-1553 (3)
MIPI (533)
Multi-Protocol PHY (34)
PCI (249)
RapidIO (7)
SAS (6)
SATA (75)
Serdes (108)
Smart Card (7)
UFS (8)
USB (412)
V-by-One (22)
VESA (73)
Other (67)
AMBA AHB / APB (169)
AMBA AXI (29)
UCIe (8)
HDMI Controller (39)
HDMI PHY (21)
MIPI C-PHY (15)
MIPI C-PHY/D-PHY Combo (67)
MIPI Controller (74)
MIPI CSI-2 (13)
MIPI CSI-4 (1)
MIPI CSI-5 (2)
MIPI D-PHY (142)
MIPI DSI (9)
MIPI HSI (1)
MIPI I3C (23)
MIPI LLI (1)
MIPI M-PHY (20)
MIPI PHY (143)
MIPI RFFE (6)
MIPI SLIMbus (2)
MIPI SPMI (9)
MIPI UniPro (5)
PCI Controller (15)
PCI Express (136)
PCI Express Controller (19)
PCI Express Phy (56)
PCI Serdes / PHY (18)
SAS Controller (6)
SATA Controller (46)
SATA PHY (10)
USB 3.0 (155)
USB 3.0 Controller (6)
USB 3.0 PHY (14)
USB 3.1 (12)
USB 3.1 PHY (4)
USB 3.2 (8)
USB 3.2 Controller (4)
USB 3.2 PHY (9)
USB Controller (34)
USB On-The-Go (20)
USB On-The-Go Controller (5)
USB On-The-Go PHY (25)
USB Phy (65)
USB4 (6)
USB4 PHY (6)
DisplayPort (54)
VESA DSC (16)
VESA VDC-M (3)
You must be registered with the D&R website to view the full search results, including:
Complete datasheets for
IP Core
products
Contact information for
IP Core
suppliers
Please
log in
here to your account.
New user ?
Signup here
.
73 IP
51
0.0
Display Stream Compression (DSC 1.2) Encoder
The Trilinear Technologies Display Stream Compression (DSC) Encoder offers real-time compression of high-definition streams with resolutions up to 8K....
52
0.0
DisplayPort 1.4 Transmitter Link Controller
Continuing the highly successful line of DisplayPort link controller cores, the Trilinear VF-111T DisplayPort Transmitter core has been updated to inc...
53
0.0
DisplayPort 1.4a IP Core
DisplayPort heralds a new alternative in video connectivity. Designed to enable low cost direct drive monitors and backed by industry leaders (Intel, ...
54
0.0
DisplayPort 1.x Receiver IP
SmartDV's DisplayPort 1.x Receiver IP is a fully featured DisplayPort receiver solution purpose-built for SoC designs requiring reliable, standards-co...
55
0.0
DisplayPort 1.x Transmitter IP
SmartDV's DisplayPort 1.x Transmitter IP is a fully featured DisplayPort transmitter solution purpose-built for SoC designs requiring reliable, standa...
56
0.0
DisplayPort Receiver Link Controller
Our 5th generation DisplayPort Receiver Link Controller core supports DisplayPort 1.4, 2.0 and embedded DisplayPort 1.4b features, including link rate...
57
0.0
DisplayPort Transmitter & Receiver
Logic Fruit Technologies has designed & implemented DISPLAY PORT Transmitter & Receiver IP Cores supporting multiple line rates up to 8.1Gbps. The IP ...
58
0.0
DisplayPort Transmitter Link Controller
Our 5th generation DisplayPort Transmitter Link Controller core supports DisplayPort 1.4, 2.0 and embedded DisplayPort 1.4b features, including link r...
59
0.0
DP 1.4 / eDP v1.4b TXPHY (14nm) 14LPU
The eDP v1.4b TX PHY IP consists of a hard macro architecture supporting embedded DisplayPort v1.4 specification with data rates up to 8.1 Gbps per la...
60
0.0
DP 1.4 / eDP v1.4b TXPHY (8nm) 8LPU
The eDP v1.4b TX PHY IP consists of a hard macro architecture supporting embedded DisplayPort v1.4 specification with data rates up to 8.1 Gbps per la...
61
0.0
DP 2.1a / eDP v2.0 RXPHY (4nm) SF4X
The DP/eDP RX PHY consists of hardmacro PHY compliant to DP v2.1a and eDP v2.0 specification, supporting maximum data rate of up to UHBR(20Gbps) opera...
62
0.0
DP 2.1a / eDP v2.0 TXPHY (4nm) SF4X
The DP/eDP TX PHY consists of hardmacro PHY compliant to DP v2.1a and eDP v2.0 specification, supporting maximum data rate of up to UHBR(20Gbps) opera...
63
0.0
DP/eDP PHY + Controller
INNOSILICON™ DP/eDP IP is designed for transmitting or receiving video and audio signals between the video source devices and display devices. It is f...
64
0.0
DP1.1 RX PHY
Innosilicon DP RX PHY is designed to receive and recover the video, audio and auxiliary data from a DP or eDP source device for display applications. ...
65
0.0
DP1.2 RX PHY
Innosilicon DP RX PHY is designed to receive and recover the video, audio and auxiliary data from a DP or eDP source device for display applications. ...
66
0.0
DP1.2 Transmitter PHY
Innosilicon DP TX IP is designed to transmit video, audio and auxiliary data from system host device to a display device for display applications. In...
67
0.0
DP1.2 Transmitter PHY_40nm
Innosilicon DP TX IP is designed to transmit video, audio and auxiliary data from system host device to a display device for display applications. In...
68
0.0
DP1.4 Receiver Controller
This document describes the low power Innosilicon DP 1.4 Receiver controller, which is fully compliant with DP 1.4 specification and eDP 1.4 standard....
69
0.0
DP1.4 TX PHY
Innosilicon eDP TX PHY is designed to transmit video, audio, and auxiliary data from a system host device to a display device for display applications...
70
0.0
DSC 1.2b Decoder
The DSC 1.2b Decoder is an efficient video decompression IP that complies with the VESA Display Stream Compression (DSC) 1.2b standard. Optimized for ...
71
0.0
DSC 1.2b Encoder
The DSC 1.2b Encoder is an efficient video compression IP that complies with the VESA Display Stream Compression (DSC) 1.2b standard. Optimized for lo...
72
0.0
DSC decoder IP
DSC decoder IP is compliant with standard VESA Display Stream Compression version 1.1/1.2/1.2a....
73
0.0
MST Topology Management Stack
The Trilinear Technologies DisplayPort Multi-stream Transport (MST) Topology Management Software enables developers to accelerate software development...
|
Previous
|
2