Design & Reuse
Catalog of SIP Cores
System on Chip design resources
arrow AMBA AHB / APB/ AXI (186)
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arrow Interlaken (2)
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arrow MIPI (531)
arrow Multi-Protocol PHY (34)
arrow PCI (247)
arrow RapidIO (7)
arrow SAS (6)
arrow SATA (75)
arrow Serdes (108)
arrow Smart Card (7)
arrow UFS (8)
arrow USB (412)
arrow V-by-One (22)
arrow VESA (79)
arrow Other (71)
2025 IP
1051
0.0
112G VSR PHY in TSMC (N5, N3P)
Synopsys IP Multi-Protocol 112G PHY IP is part of Synopsys’ high- performance multi-rate transceiver portfolio for high-end networking and high perfor...
1052
0.0
112G-LR PAM4 SerDes PHY for Intel
112G-LR Serdes PAM4 PHY Enables reliable high-speed data transfer over backplane, DAC, chip-to-chip, and chip-to-module channel The Cadence 112Gbps...
1053
0.0
112G-LR PAM4 SerDes PHY for Samsung
112G-LR Serdes PAM4 PHY Enables reliable high-speed data transfer over backplane, DAC, chip-to-chip, and chip-to-module channel The Cadence 112Gbps...
1054
0.0
112G-LR PAM4 SerDes PHY for TSMC
112G-LR Serdes PAM4 PHY Enables reliable high-speed data transfer over backplane, DAC, chip-to-chip, and chip-to-module channel The Cadence 112Gbps...
1055
0.0
112G-ULR PAM4 SerDes PHY for Samsung SF5A
112G-ULR Serdes PAM4 PHY Enables reliable high-speed data transfer over backplane, DAC, chip-to-chip, and chip-to-module channel The Cadence 112Gbps ...
1056
0.0
112G-ULR PAM4 SerDes PHY for TSMC N3E/N3P
112G-ULR Serdes PAM4 PHY Enables reliable high-speed data transfer over backplane, DAC, chip-to-chip, and chip-to-module channel The Cadence 112Gbps ...
1057
0.0
112G-ULR PAM4 SerDes PHY for TSMC N5/N4P
112G-ULR Serdes PAM4 PHY Enables reliable high-speed data transfer over backplane, DAC, chip-to-chip, and chip-to-module channel The Cadence 112Gbps ...
1058
0.0
112G-ULR PAM4 SerDes PHY for TSMC N6/N7
112G-ULR Serdes PAM4 PHY Enables reliable high-speed data transfer over backplane, DAC, chip-to-chip, and chip-to-module channel The Cadence 112Gbps ...
1059
0.0
112G-VSR for TSMC N3E/N3P
112G-VSR Serdes PAM4 PHY Enables reliable high-speed data transfer over backplane, DAC, chip-to-chip, and chip-to-module channel The Cadence 112Gbps ...
1060
0.0
112Gb/s PAM4 SERDES PHY (14nm) 14LPU
The Ethernet PHY IP is used for CEI-112G applications and serializes 8b/10b encoded data for Gen1 and Gen2, as well as 128b/130b encoded data for Gen3...
1061
0.0
112Gbps VSR to extended LR SerDes IP on TSMC 16/12nm
Credo is a world leading SerDes Technology Company offers silicon proven SerDes IP from 1G to 100G data rates offering superior performance and power....
1062
0.0
112Gbps VSR to extended LR SerDes IP on TSMC N3
Credo is a world leading SerDes Technology Company offers silicon proven SerDes IP from 1G to 100G data rates offering superior performance and power....
1063
0.0
112Gbps VSR to extended LR SerDes IP on TSMC N5/N4
Credo is a world leading SerDes Technology Company offers silicon proven SerDes IP from 1G to 100G data rates offering superior performance and power....
1064
0.0
112Gbps VSR to extended LR SerDes IP on TSMC N7/N6
Credo is a world leading SerDes Technology Company offers silicon proven SerDes IP from 1G to 100G data rates offering superior performance and power....
1065
0.0
112Gbps XSR SerDes IP on TSMC 12nm
Credo is a world leading SerDes Technology Company offers silicon proven SerDes IP from 1G to 112G data rates and the first in the industry to demo...
1066
0.0
112Gbps XSR SerDes IP on TSMC 5/4nm
Credo is a world leading SerDes Technology Company offers silicon proven SerDes IP from “1G to 112G” data rates and the first in the industry to demon...
1067
0.0
112Gbps XSR SerDes IP on TSMC 7/6nm
Credo is a world leading SerDes Technology Company offers silicon proven SerDes IP from “1G to 112G” data rates and the first in the industry to de...
1068
0.0
32-bit PCI Bus Master/Target
32-bit PCI Bus Master/Target with configurable FIFOs and AHB back end...
1069
0.0
32-bit, 33 MHz PCI Target Interface Core
The main PCI-T32 Interface core purpose is to isolate the user from having to solve complex problems of the PCI interface implementation and let the u...
1070
0.0
32-bit/33,66Mhz PCI Host Bridge
...
1071
0.0
12.5G Multiprotocol Serdes IP, Silicon Proven in SMIC 12SF++
The multi-protocol SerDes PHY includes Peripheral Component Interconnect Express (PCIe) conforming with PCIe 2.0 Base Specification with support for P...
1072
0.0
12.5G Multiprotocol Serdes IP, Silicon Proven in SMIC 40LL
The multi-protocol SerDes PHY consist of Peripheral Component Interconnect Express (PCIe) compliant with PCIe 2.0 Base Specification with support of P...
1073
0.0
12.5G Multiprotocol Serdes IP, Silicon Proven in TSMC 28HPC+
The multi-protocol SerDes PHY consists of Serial ATA (SATA) conforming with SATA 3.0 Specification, Peripheral Component Interconnect Express (PCIe) c...
1074
0.0
12.5G Multiprotocol Serdes IP, Silicon Proven in UMC 28HPC
The multi-protocol SerDes PHY consists of Serial ATA (SATA) conforming with SATA 3.0 Specification, Peripheral Component Interconnect Express (PCIe) c...
1075
0.0
12.5G Serdes in SMIC 40NLL
Brite Semiconductor‘s Serdes provides 2.5-32Gbps multi-rate SERDES IP which is designed for smooth integration of Multiple SERDES lanes demonstrate go...
1076
0.0
224G Ethernet PHY in Samsung (SF4X, SF2P)
The Synopsys 224G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency need...
1077
0.0
224G Ethernet PHY IP for TSMC N3P
The Synopsys 224G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency need...
1078
0.0
224G-LR SerDes PHY for TSMC N3E/N3P
224G-LR SerDes PHY enables 1.6T and 800G networks The Cadence 224G SerDes PHY for UALink enables the emerging 1.6T and 800G scale-up networks for hyp...
1079
0.0
224G-LR SerDes PHY for UALink for Intel 18A
224G-LR SerDes PHY enables 1.6T and 800G networks for UALink The Cadence 224G SerDes PHY for UALink enables the emerging 1.6T and 800G scale-up net...
1080
0.0
224G-LR SerDes PHY for UALink for TSMC N3E/N3P
224G-LR SerDes PHY enables 1.6T and 800G networks for UALink The Cadence 224G SerDes PHY for UALink enables the emerging 1.6T and 800G scale-up netwo...
1081
0.0
I2C Bus Master / Slave Controller Interface with FIFO
The I2C is a two-wire, bi-directional serial bus, which provides a simple and efficient method of short distance data transmission between many device...
1082
0.0
I2C Controller (AMBA APB <-> I2C)
The I2C Controller provides access to devices with I2C interface. It accepts the Read / Write commands from APB and converts it to the serial I2C acce...
1083
0.0
I2C Host / Device Bus Controller
The synchronous I2C interface is a block that interconnects an APB bus. The APB - I2C Bridge interfaces to the APB bus on the system side and the I2C ...
1084
0.0
I2C Master / Slave Controller with FIFO (AXI & AXI-Lite Bus)
The I2C is a two-wire, bi-directional serial bus, which provides a simple and efficient method of short distance data transmission between many device...
1085
0.0
I2C Master and Slave
I2C is a two-wire, bi-directional serial bus that provides a simple and efficient method of data exchange between devices. It is most suitable for app...
1086
0.0
I2C Master Controller w/FIFO (AHB & AHB-Lite Bus)
The Digital Blocks DB-I2C-M-AHB Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC, or other high performance microprocessor via the AMBA 2.0 AP...
1087
0.0
I2C Master Controller w/FIFO (AXI & AXI-Lite Bus)
The Digital Blocks DB-I2C-M-AXI Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC, or other high performance microprocessor via the AMBA 2.0 AX...
1088
0.0
I2C Master IP
SmartDV's I2C Master IP is a silicon-proven, fully featured Inter-Integrated Circuit bus master solution purpose-built for SoC designs requiring relia...
1089
0.0
I2C Slave Controller - Low Power, Low Noise Config with APB Interface
The Digital Blocks DB-I2C-S-SCL-CLK-APB Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC or other high performance microprocessor via the AMBA...
1090
0.0
I2C Slave Controller w/FIFO (AHB Bus)
The Digital Blocks DB-I2C-S-AHB Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC or other high performance microprocessor via the AMBA 2.0/3.0...
1091
0.0
I2C Slave Controller w/FIFO (APB Bus)
The Digital Blocks DB-I2C-S-APB Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC or other high performance microprocessor via the AMBA 2.0 APB...
1092
0.0
I2C Slave Controller w/FIFO (AXI Bus)
The Digital Blocks DB-I2C-S-AXI Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC or other high performance microprocessor via the AMBA 4/3 AXI...
1093
0.0
I2C Slave Controller with User Register Array / Memory / FIFO / AMBA Interface
The DB-I2C-S-REG is an I2C Slave Controller IP Core focused on low VLSI footprint ASIC / ASSP designs interfacing to user registers while autonomous i...
1094
0.0
I2C Slave IP
SmartDV's I2C Slave IP is a silicon-proven, fully featured Inter-Integrated Circuit bus slave solution purpose-built for SoC designs requiring reliabl...
1095
0.0
I2C Slave To AHB Bridge IP
SmartDV's I2C Slave To AHB Bridge IP is a silicon-proven, fully featured protocol bridge solution purpose-built for SoC designs requiring seamless con...
1096
0.0
I2C Slave To AXI Bridge IP
SmartDV's I2C Slave To AXI Bridge IP is a silicon-proven, fully featured protocol bridge solution purpose-built for SoC designs requiring seamless con...
1097
0.0
I2C Slave with AHB Master Bridge (I2C2AHB)
The DB-I2C-S-AHB-BRIDGE is an I2C Slave Controller IP Core focused on low VLSI footprint ASIC / ASSP designs not requiring internal configuration & c...
1098
0.0
I2C Slave with AXI Master Bridge (I2C2AXI4)
The DB-I2C-S-AXI-BRIDGE is an I2C Slave Controller IP Core focused on low VLSI footprint ASIC / ASSP designs not requiring internal configuration & c...
1099
0.0
I2C/SMBus Master/Slave Controller w/FIFO (AXI/AHB/APB)
The Digital Blocks DB-I2C-SMBus-MS-AMBA Controller IP Core is an I2C/SMBus Master/Slave Controller, interfacing a microprocessor via the AMBA AXI, AHB...
1100
0.0
I2CM - DI2CM - I2C Bus Interface - Master
The I2C is a two-wire, bi-directional serial bus, that provides a simple and efficient method of short distance data transmission between many devices...