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1877 IP
1051
0.0
V-By-One PHY & Controller (Tx+ Rx)
INNOSILICON™ VBO IP is designed for transmitting or receiving video signals between a video source device and display device, The IP is fully complian...
1052
0.0
V-By-One Receiver IP
VBYONE Receiver core is compliant with standard VByOne specification as 1.2/1.3/1.4. Through its compatibility, it provides a simple interface to a wi...
1053
0.0
V-By-One Receiver_8ch
Innosilicon VBO RX IP is designed to receive and recover the video data from a VBO source device for display applications. Innosilicon VBO RX IP is c...
1054
0.0
V-by-One Rx IP, Silicon Proven in 40G
Using internal equipment connections, the V-by-One HS technology seeks to send video signals at a high data rate. The V-by-One HS Standard outlines th...
1055
0.0
V-by-One Rx IP, Silicon Proven in SMIC 40LL
The V-by-One HS technology aims to transmit video signals at a high data rate using internal equipment connections. The requirements to create a trans...
1056
0.0
V-By-One Transmitter IP
VBYONE Transmitter core is compliant with standard VByOne specification as 1.2/1.3/1.4. Through its compatibility, it provides a simple interface to a...
1057
0.0
V-by-One Tx IP, Silicon Proven in 40G
The V-by-One HS technology aims to transmit video signals at a high data rate using an internal connection between devices. The requirements to create...
1058
0.0
V-by-One/ LVDS Tx IP, Silicon Proven in SMIC 40LL
The V-by-One® HS technology aims to transmit video signals at a high data rate using internal equipment connections. The requirements to create a tran...
1059
0.0
V-by-One/LVDS Rx IP, Silicon Proven in GF 22FDX
The V-by-One® HS technology aims to transmit video signals at a high data rate using internal equipment connections. The requirements to create a tran...
1060
0.0
V-by-One/LVDS Rx IP, Silicon Proven in SMIC 40LL
V-by-One® HS technology targets a high-speed data transmission of video signals based on internal connection of equipment. V-by-One® HS Standard defin...
1061
0.0
V-by-One/LVDS Tx Combo PHY, Silicon Proven in 28HPC+
V-by-One/ LVDS Tx Combo PHY IP Core aims at achieving high-speed data transmission for video signals through internal equipment connections. The V-by-...
1062
0.0
V-by-One/LVDS Tx IP, Silicon Proven in GF 22FDX
Based on internal equipment connections, the V-by-One® HS technology aims to transmit video signals at high data rates. The requirements to build a tr...
1063
0.0
6.25G SerDes in 55nm
The Actt's 6.25G SerDes IP is a 4-Channel Serdes configuration with 1 PLL, 4 TX channels and 4 RX channels. It’s based on SMIC 55nm embedded-flash tec...
1064
0.0
2.5G MIPI D-PHY in HLMC 28nm
The ACTT family of interface IP for MIPI protocols is leading the way with mobile-optimized low power and high performance. Compliant with the specifi...
1065
0.0
1.5G MIPI D-PHY in SMIC 130nm~28nm
The ACTT family of interface IP for MIPI protocols is leading the way with mobile-optimized low power and high performance. Compliant with the specifi...
1066
0.0
2.5G MIPI D-PHY in TSMC 22nm
The ACTT family of interface IP for MIPI protocols is leading the way with mobile-optimized low power and high performance. Compliant with the specifi...
1067
0.0
2.5Gbps Per Lane MIPI-CSI2 Compliant Serial Video Receiver
The SVRPlus supports a clock lane and 4 data lanes, each lane featuring at up to 2.5Gbps, for a total of 10Gbps. The highly parallel architecture ...
1068
0.0
2.5Gbps Per Lane MIPI-CSI2 Compliant Serial Video Transmitter
The SVTPlus supports a clock lane and 4 data lanes, each lane featuring at up to 2.5Gbps, for a total of 10Gbps. The highly parallel architecture of t...
1069
0.0
4.5Gbps/lane MIPI D-PHY in SMIC 28HKC+
BriteSemi’s MIPI D-PHY supports speed up to 4.5Gbps per lane and an aggregate data rate of 18Gbps, which can provide high-performance MIPI D-PHY solut...
1070
0.0
2.5Gbps/lane MIPI D-PHY in SMIC 40NLL
BriteSemi’s MIPI D-PHY supports speed up to 4.5Gbps per lane and an aggregate data rate of 18Gbps, which can provide high-performance MIPI D-PHY solut...
1071
0.0
10/100 Mbit Ethernet MAC
The GRETH core implements 10/100 Mbit/s Ethernet Media Access Controller (MAC) with AMBA host interface. The core implements the 802.3-2002 Ethernet s...
1072
0.0
30G MR Multi-Protocol SerDes (MPS) PHY
Optimized for power and area, our line-up of SerDes PHYs, deliver maximum performance and flexibility for today's most challengings applications The ...
1073
0.0
112G PHY in TSMC (N7, N5)
Synopsys IP Multi-Protocol 112G PHY IP is part of Synopsys’ high- performance multi-rate transceiver portfolio for high-end networking and high perfor...
1074
0.0
112G SerDes IP Core in 6nm
The 112G SerDes PHY IP Core in 6nm offers best-in-class serial link performance for advanced SoC designs. Supporting multi-rate operation from 1 Gbps ...
1075
0.0
112G SerDes PHY IP in 12nm
The 112G SerDes PHY IP Core, fabricated in 12nm FinFET technology, delivers scalable high-speed connectivity for modern SoC platforms. Supporting up t...
1076
0.0
112G Serdes PHY IP in 5nm
The 112 Gbps SerDes PHY IP Core, natively developed in 5 nm FinFET, unlocks unmatched serial speeds for SoC interconnects, supporting both PAM4 (56–11...
1077
0.0
112G VSR PHY in TSMC (N5, N3P)
Synopsys IP Multi-Protocol 112G PHY IP is part of Synopsys’ high- performance multi-rate transceiver portfolio for high-end networking and high perfor...
1078
0.0
112G-ULR PAM4 SerDes PHY for Samsung SF5A
112G-ULR Serdes PAM4 PHY Enables reliable high-speed data transfer over backplane, DAC, chip-to-chip, and chip-to-module channel The Cadence 112Gbps ...
1079
0.0
112G-ULR PAM4 SerDes PHY for TSMC N3E/N3P
112G-ULR Serdes PAM4 PHY Enables reliable high-speed data transfer over backplane, DAC, chip-to-chip, and chip-to-module channel The Cadence 112Gbps ...
1080
0.0
112G-ULR PAM4 SerDes PHY for TSMC N5/N4P
112G-ULR Serdes PAM4 PHY Enables reliable high-speed data transfer over backplane, DAC, chip-to-chip, and chip-to-module channel The Cadence 112Gbps ...
1081
0.0
112G-ULR PAM4 SerDes PHY for TSMC N6/N7
112G-ULR Serdes PAM4 PHY Enables reliable high-speed data transfer over backplane, DAC, chip-to-chip, and chip-to-module channel The Cadence 112Gbps ...
1082
0.0
112G-VSR for TSMC N3E/N3P
112G-VSR Serdes PAM4 PHY Enables reliable high-speed data transfer over backplane, DAC, chip-to-chip, and chip-to-module channel The Cadence 112Gbps ...
1083
0.0
112Gbps VSR to extended LR SerDes IP on TSMC 16/12nm
Credo is a world leading SerDes Technology Company offers silicon proven SerDes IP from 1G to 100G data rates offering superior performance and power....
1084
0.0
112Gbps VSR to extended LR SerDes IP on TSMC N3
Credo is a world leading SerDes Technology Company offers silicon proven SerDes IP from 1G to 100G data rates offering superior performance and power....
1085
0.0
112Gbps VSR to extended LR SerDes IP on TSMC N5/N4
Credo is a world leading SerDes Technology Company offers silicon proven SerDes IP from 1G to 100G data rates offering superior performance and power....
1086
0.0
112Gbps VSR to extended LR SerDes IP on TSMC N7/N6
Credo is a world leading SerDes Technology Company offers silicon proven SerDes IP from 1G to 100G data rates offering superior performance and power....
1087
0.0
112Gbps XSR SerDes IP on TSMC 12nm
Credo is a world leading SerDes Technology Company offers silicon proven SerDes IP from 1G to 112G data rates and the first in the industry to demo...
1088
0.0
112Gbps XSR SerDes IP on TSMC 5/4nm
Credo is a world leading SerDes Technology Company offers silicon proven SerDes IP from “1G to 112G” data rates and the first in the industry to demon...
1089
0.0
112Gbps XSR SerDes IP on TSMC 7/6nm
Credo is a world leading SerDes Technology Company offers silicon proven SerDes IP from “1G to 112G” data rates and the first in the industry to de...
1090
0.0
32-bit PCI Bus Master/Target
32-bit PCI Bus Master/Target with configurable FIFOs and AHB back end...
1091
0.0
32-bit, 33 MHz PCI Target Interface Core
The main PCI-T32 Interface core purpose is to isolate the user from having to solve complex problems of the PCI interface implementation and let the u...
1092
0.0
32-bit/33,66Mhz PCI Host Bridge
...
1093
0.0
12.5G Multiprotocol Serdes IP, Silicon Proven in SMIC 12SF++
The multi-protocol SerDes PHY includes Peripheral Component Interconnect Express (PCIe) conforming with PCIe 2.0 Base Specification with support for P...
1094
0.0
12.5G Multiprotocol Serdes IP, Silicon Proven in SMIC 40LL
The multi-protocol SerDes PHY consist of Peripheral Component Interconnect Express (PCIe) compliant with PCIe 2.0 Base Specification with support of P...
1095
0.0
12.5G Multiprotocol Serdes IP, Silicon Proven in TSMC 28HPC+
The multi-protocol SerDes PHY consists of Serial ATA (SATA) conforming with SATA 3.0 Specification, Peripheral Component Interconnect Express (PCIe) c...
1096
0.0
12.5G Multiprotocol Serdes IP, Silicon Proven in UMC 28HPC
The multi-protocol SerDes PHY consists of Serial ATA (SATA) conforming with SATA 3.0 Specification, Peripheral Component Interconnect Express (PCIe) c...
1097
0.0
12.5G Serdes in SMIC 40NLL
Brite Semiconductor‘s Serdes provides 2.5-32Gbps multi-rate SERDES IP which is designed for smooth integration of Multiple SERDES lanes demonstrate go...
1098
0.0
224G Ethernet PHY in Samsung (SF4X, SF2P)
The Synopsys 224G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency need...
1099
0.0
224G Ethernet PHY IP for TSMC N3P
The Synopsys 224G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency need...
1100
0.0
224G-LR SerDes PHY for TSMC N3E/N3P
224G-LR SerDes PHY enables 1.6T and 800G networks The Cadence 224G SerDes PHY for UALink enables the emerging 1.6T and 800G scale-up networks for hyp...
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