Design & Reuse
Catalog of SIP Cores
System on Chip design resources
1940 IP
1151
0.0
I2CS - DI2CS - Slave I2C bus controller with FIFO
The DI2CS core provides an interface between a microprocessor / microcontroller and I2C bus. It can work as: - a slave transmitter or - slave rece...
1152
0.0
I2CSB - DI2CSB - I2C Bus Interface Slave -Base version
The I2C is a two-wire, bi-directional serial bus, which provides a simple and efficient method of short distance data transmission between many device...
1153
0.0
32G LR Multi-Protocol SerDes (MPS) PHY
Designed to meet the power efficiency and performance requirements of next-generation, high-speed wireline and wireless 5G infrastructure. The 32G ...
1154
0.0
12G Multiprotocol Serdes IP, Silicon Proven in SMIC 14SF+
The multi-protocol SerDes PHY consist of Peripheral Component Interconnect Express (PCIe) compliant with PCIe 2.0 Base Specification with support of P...
1155
0.0
32G SerDes PHY IP in 28nm
The 32G SerDes IP enables ultra-fast serial communication at up to 32 Gbps per channel, providing a scalable and production-ready solution for high-pe...
1156
0.0
M31 MIPI M-PHY v5.0 IP in 5nm for mobile/automotive applications
MIPI M-PHY is a serial interface technology with high bandwidth capabilities, which is particularly developed for mobile applications to obtain low pi...
1157
0.0
I3C
INNOSILICON™ I3C IP is fully compatible with the MIPI I3C and JESD403-1B standard and backward compatible to I2C. It enhances the existing I2C IP by n...
1158
0.0
I3C Controller
Controller IP for the MIPI I3C interface The Cadence® IP Family for MIPI® Protocols delivers area-optimized interface IP with the low power and hig...
1159
0.0
I3C HDK
The I3C Total IP in a box HDK gives I3C SoC developers all the resources they need to implement MIPI I3C specifications right out of the box. The HDK...
1160
0.0
I3C Master / Slave Controller w/FIFO (APB Bus)
The Digital Blocks DB-I3C-MS-APB Controller IP Core interfaces a microprocessor via the AMBA APB Bus to an I3C Bus, compliant to the MIPI I3C – Improv...
1161
0.0
I3C Master Controller w/FIFO (APB Bus)
The Digital Blocks DB-I3C-MS-APB Controller IP Core interfaces a microprocessor via the AMBA APB Bus to an I3C Bus, compliant to the MIPI I3C – Improv...
1162
0.0
I3C Prototyping Kit (HDK) Total IP in a Box
The I3C Total IP in a box HDK gives I3C SoC developers all the resources they need to implement MIPI I3C specifications right out of the box. The HDK...
1163
0.0
I3C Slave Controller w/FIFO (APB Bus)
The Digital Blocks DB-I3C-S-APB Controller IP Core interfaces a microprocessor via the AMBA APB Bus to an I3C Bus, compliant to the MIPI I3C – Improve...
1164
0.0
64G Multi-SerDes
INNOSILICON™ 64G Multi-SerDes PHY IP is a highly configurable PHY capable of supporting speeds up to 64 Gbps within a single lane. The PHY is pre-conf...
1165
0.0
16G Multi-Protocol SerDes (MPS) PHY
Silicon-proven PHY for PCIe, USB, Ethernet, DisplayPort, and other protocols The 16 Gbps Multi-Protocol SerDes (MPS) PHYs are a high-performance se...
1166
0.0
16G Multi-Protocol SerDes (MPS) PHY For TSMC
Silicon-proven PHY for PCIe, USB, Ethernet, DisplayPort, and other protocols The 16 Gbps Multi-Protocol SerDes (MPS) PHYs are a high-performance se...
1167
0.0
16G Multiproocol Serdes IP, Silicon Proven in TSMC 28HPC+
The multi protocol SerDes PHY consist of Peripheral Component Interconnect Express (PCIe) compliant with PCIe 4.0, 3.0, 2.0 Base Specification with su...
1168
0.0
16G SerDes in 28nm
The Actt's 16G SerDes IP is a high performance Multi-lane SerDes PHY IP designed for chips that perform high bandwidth data communication while operat...
1169
0.0
16G Serdes in SMIC 28HKCP
Brite Semiconductor‘s Serdes provides 2.5-32Gbps multi-rate SERDES IP which is designed for smooth integration of Multiple SERDES lanes demonstrate go...
1170
0.0
16G Serdes in SMIC 28HKD 0.9/1.8V
Brite Semiconductor‘s Serdes provides 2.5-32Gbps multi-rate SERDES IP which is designed for smooth integration of Multiple SERDES lanes demonstrate go...
1171
0.0
16G Serdes in SMIC 28HKD 0.9/2.5V
Brite Semiconductor‘s Serdes provides 2.5-32Gbps multi-rate SERDES IP which is designed for smooth integration of Multiple SERDES lanes demonstrate go...
1172
0.0
16G UCIe-SP PHY - GlobalFoundries 22FDX/22FDX+
EXTOLL’s high-speed UCIe PHY IP provides low-latency, high-bandwidth serial I/O capabilities for state-of-the-art Chiplet projects. The PHY comes as ...
1173
0.0
56G-LR Pam4 SerDes for TSMC
56G LR SerDes PHY provides exceptional performance w/ best-in-class power & area, making it ideal for machine learning and 5G. The Cadence 56Gbps L...
1174
0.0
56G-LR Pam4 SerDes for TSMC N6/N7
56G LR SerDes PHY provides exceptional performance w/ best-in-class power & area, making it ideal for machine learning and 5G The Cadence 56Gbps Long...
1175
0.0
56Gbps LR SerDes IP on TSMC 16/12nm
Credo is a world leading SerDes Technology Company offers silicon proven SerDes IP from 1G to 112G data rates. Features include the lowest power i...
1176
0.0
56Gbps LR SerDes IP on TSMC 7nm
Credo is the world leading SerDes Technology. SerDes PMA is silicon proven IP offers in TSMC 7nm processes. Features include excellent insertion loss...
1177
0.0
56Gbps VSR to extended LR SerDes IP on TSMC N7/N6
Credo is a world leading SerDes Technology Company offers silicon proven SerDes IP from 1G to 50G data rates offering superior performance and ultra l...
1178
0.0
28G Ethernet PHY IP for TSMC N7
The multi-lane Synopsys Multi-Protocol 32G PHY IP is part of Synopsys’ high-performance multi-rate transceiver portfolio for high-end networking and ...
1179
0.0
28G LR Multi-Protocol SerDes (MPS) PHY
Optimized for power and area, our line-up of SerDes PHYs, deliver maximum performance and flexibility for today's most challenging designs. The 28 ...
1180
0.0
28Gbps LR SerDes IP on TSMC 28nm
Credo is the world leading SerDes Technology Company offers silicon proven SerDes IP from 1G to 112G data rate. Features include excellent insertio...
1181
0.0
28Gbps MR SerDes IP on TSMC 28nm
Credo is the world leading SerDes Technology Company offers silicon proven SerDes IP from 1G to 112G data rates. This SerDes PMA is silicon proven...
1182
0.0
RapidIO 2.0 PHY & Controller
The Innosilicon Serdes Combo PHY is a highly programmable module that processes high-speed serial data to parallel data compatible with the PHY Interf...
1183
0.0
RapidIO EndPoint Controller IP
RapidIO EP interface provides full support for the RapidIO EP synchronous serial interface, compatible with RapidIO Interconnect 2.2 specification. Th...
1184
0.0
SAS Initiator IP
The SAS Initiator IP core is fully compliant with Serial ATA SCSI 5.0 Specification. Through its compatibility, it provides a simple interface to a wi...
1185
0.0
SATA 3.0 Host Controller
The Chevin Technology SATA-HC IP block simplifies the integration of high capacity SSDs utilizing SATA I/II/III at 1.5/3/6Gbit/s data rates using Xili...
1186
0.0
SATA 3.0 PHY
The INNOSILICON mixed signal SATA3.0 transceiver PHY provides a complete SATA3.0 standard compliant transceiver physical interface solution for delive...
1187
0.0
SATA Host Controller
HCLSATAHC26113G core handles data movement between system memory and a SATA device. The core implements transport layer & link layer functions. HCL...
1188
0.0
SATA Host Controller IP
SATA HOST CONTROLLER core is compliant with SATA version 3.5 specification. Through its compatibility, it provides a simple interface to a wide range...
1189
0.0
SATA Port Multiplier with Sandbox
The IntelliProp IPP-SA128A-PM (SATA Port Multiplier with Sandbox) device is an IP core that provides SATA Port Multiplier functionality with support f...
1190
0.0
MAXVY MIPI CSI -2 TRANSMITTER IP -V3
MIPI CSI-2 (Camera Serial Interface) Transmitter IP defines an interface between a peripheral device (camera) and host processor (application engine) ...
1191
0.0
MAXVY MIPI DSI-2 RX Controller IP
The MAXVY's MIPI DSI-2 RX Controller IP is a fully compliant receive solution designed to interface with MIPI DSI-2 transmitters and deliver display d...
1192
0.0
MAXVY MIPI SPMI HOST CONTROLLER
The System Power Management Interface is a two wire interface that connects the integrated power controller (PC) of a System-on-Chip (SoC) processor s...
1193
0.0
Scatter-Gather DMA - AXI4-Stream to/from AXI4 Memory Map Transfers
The Digital Blocks DB-DMAC-MC-AXI4-MM-STREAM Verilog RTL IP Core is a Multi-Channel Scatter-Gather DMA Controller that transfers data between AXI4 Mem...
1194
0.0
PCI 32-bit, 33 MHz Multifunction Target Interface
The PCI-T32MF implements a target-only PCI interface compliant with the PCI 2.3 specification. It supports a 32-bit address/data bus and operates up t...
1195
0.0
PCI AMBA AHB Device/Host Bridge
This PCI Host Bridge IP core enables data transfers between an AMBA® AHB host processor bus system and PCI bus based devices. The bridge supports H...
1196
0.0
PCI Express (PCIe) 2.1 Controller
Application-optimized, high-performance controller IP for PCIe The Cadence® Controller IP for PCIe® 2.0 is a solution created for less demanding de...
1197
0.0
PCI Express (PCIe) 3.1 Controller
Application-optimized, high-performance controller IP for PCIe The Cadence® Controller IP for PCIe® 3.1 is a solution created for mobile applicatio...
1198
0.0
PCI Express (PCIe) 4.0 Controller
Application-optimized, high-performance controller IP for PCIe The Cadence® Controller IP for PCIe 4.0 provides the logic required to integrate a r...
1199
0.0
PCI Master/Slave IP
PCI MASTER SLAVE interface provides full support for the PCI MASTER SLAVE synchronous serial interface, compatible with PCI 2.0 specification. Through...
1200
0.0
PCI Master/Target Interface Core
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