Design & Reuse
Catalog of SIP Cores
System on Chip design resources
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2025 IP
1301
0.0
HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 90/85G
Physical layer IP core for HDMI transmitters that adheres to HDMI 1.4 requirements in full For consumer electronics like DVD player/recorders and camc...
1302
0.0
HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in UMC 28HPC
IP core that completely conforms with HDMI 1.4 requirements for physical layer HDMI transmitters For consumer electronics like DVD player/recorders an...
1303
0.0
HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in UMC 40SP
IP core for physical layer HDMI transmitters that fully complies with HDMI 1.4 specifications The HDMI transmitter PHY provides an easy-to-implement s...
1304
0.0
HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in UMC 65/55ULP
IP core that completely conforms with HDMI 1.4 requirements for physical layer HDMI transmitters For consumer electronics like DVD player/recorders an...
1305
0.0
HDMI 1.4b Tx Whitebox PHY IP - ST 28FDSOI
The ST 28FDSOI HDMI 1.4b Tx PHY IP implements the mixed-signal transmitter functions required between an HDMI link controller and the external TMDS in...
1306
0.0
HDMI 2.0 RX 1P PHY 6Gbps in TSMC (28nm)
The Synopsys HDMI Receiver (RX) IP solutions are compliant with the High- Definition Multimedia Interface (HDMI) 2.0 and 1.4 specifications and provid...
1307
0.0
HDMI 2.0 Rx PHY & Controller IP, Silicon Proven in TSMC 12FFC
This HDMI 2.O Rx IP provides a complete HDMI receiver function and complies with HDMI specification version 2.0b. It consists of two modules, a physic...
1308
0.0
HDMI 2.0 Rx PHY & Controller IP, Silicon Proven in TSMC 28HPC+
This HDMI 2.O Rx IP complies with HDMI specification version 2.0b and offers a full HDMI receiver capability. It is made up of two modules: a link mod...
1309
0.0
HDMI 2.0 Rx PHY & Controller IP, Silicon Proven in TSMC 40LP
The HDMI 2.O Rx IP complies with version 2.0b of the HDMI specification and offers the full functionality of an HDMI receiver. Physical layer (PHY) an...
1310
0.0
HDMI 2.0 Transmitter (TX) IP Solutions
The Synopsys HDMI Receiver (RX) IP solutions are compliant with the High- Definition Multimedia Interface (HDMI) 2.0 and 1.4 specifications and provid...
1311
0.0
HDMI 2.0 Tx PHY & Controller IP, Silicon Proven in ST 28FDSOI
The logic required to create and validate designs for diverse applications is provided by HDMI Transmitter (TX) IP solutions, which are compliant with...
1312
0.0
HDMI 2.0 Tx PHY & Controller IP, Silicon Proven in TSMC 12FFC
The HDMI Transmitter (TX) IP offerings adhere to HDMI 2.0 and 1.4 standards, offering the essential components for diverse design implementations. The...
1313
0.0
HDMI 2.0 Tx PHY & Controller IP, Silicon Proven in TSMC 28HPC+
In addition to adhering to HDMI 2.0 and 1.4 specifications, IP solutions for HDMI Transmitter (TX) devices offer the essential logic required to creat...
1314
0.0
HDMI 2.0 Tx PHY & Controller IP, Silicon Proven in TSMC 40LP
IP solutions for HDMI Transmitter (TX) devices are compliant with HDMI 2.0 and 1.4 specifications and offer the essential logic to create and validate...
1315
0.0
HDMI 2.0 Tx PHY & Controller IP, Silicon Proven in UMC 28HPC
In addition to adhering to HDMI 2.0 and 1.4 specifications, IP solutions for HDMI Transmitter (TX) devices offer the essential logic required to creat...
1316
0.0
HDMI 2.0 Tx Whitebox Controller IP
This HDMI 2.0b Tx Controller IP implements the digital source functions required between an SoC display pipeline and an HDMI transmitter PHY. Supporte...
1317
0.0
HDMI 2.0 Tx Whitebox PHY IP - ST 28FDSOI
This ST 28FDSOI HDMI 2.0 Tx PHY IP implements three high-speed TMDS serializers, differential output drivers, and associated clock-generation function...
1318
0.0
HDMI 2.1 Rx PHY & Controller IP, Silicon Proven in TSMC 12FFC
The HDMI V2.1 Rx provides a complete single-link HDMI receiver function complies with HDMI specification version 2.1 It consists of two modules, a phy...
1319
0.0
HDMI 2.1 Rx PHY & Controller IP, Silicon Proven in TSMC 28HPC+
The HDMI V2.1 Rx complies with version 2.1 of the HDMI specification and offers a full single-link HDMI receiver function. It is made up of two module...
1320
0.0
HDMI 2.1 Rx PHY in TSMC (N6C)
The Synopsys HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide th...
1321
0.0
HDMI 2.1 Tx PHY & Controller IP, Silicon Proven in TSMC 12FFC
The HDMI V2.1 Tx provides a complete single-link HDMI transmitter function complies with HDMI specification version 2.1 It consists of two modules, a ...
1322
0.0
HDMI 2.1 Tx PHY & Controller IP, Silicon Proven in TSMC 28HPC+
The HDMI V2.1 Tx complies with version 2.1 of the HDMI specification and offers a full single-link HDMI transmitter capability. It is made up of two m...
1323
0.0
HDMI 2.1 Tx- Rx PHY & Controller IP (Silicon Proven in TSMC 28HPC+)
The HDMI V2.1 Tx provides a complete single-link HDMI transmitter function complies with HDMI specification version 2.1. It consists of two modules, a...
1324
0.0
HDMI 2.1/DisplayPort 2.1 TX PHY in Samsung (SF5A)
The Synopsys HDMI 2.1 TX Controller and PHY IP solutions,compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide the...
1325
0.0
HDMI 2.1/DisplayPort eDP 1.4 TX PHY in TSMC (N6C, N4C)
The Synopsys HDMI 2.1 TX Controller and PHY IP solutions,compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide the...
1326
0.0
HDMI eARC Receiver IP
SmartDV's HDMI eARC Receiver IP is a fully featured Enhanced Audio Return Channel receiver solution purpose-built for SoC designs requiring reliable, ...
1327
0.0
HDMI eARC Transmitter IP
SmartDV's HDMI eARC Transmitter IP is a fully featured Enhanced Audio Return Channel transmitter solution purpose-built for SoC designs requiring reli...
1328
0.0
HDMI module cecTalker
The HDMI module cecTalker(pronounced "C-E-C-Talker") enables the user to easily design UI and UX for devices in order to make them convenien...
1329
0.0
HDMI Sink IP
SmartDV's HDMI Sink IP is a fully featured HDMI receiver solution purpose-built for SoC designs requiring reliable, standards-compliant video and audi...
1330
0.0
HDMI Source IP
SmartDV's HDMI Source IP is a fully featured HDMI transmitter solution purpose-built for SoC designs requiring reliable, standards-compliant video and...
1331
0.0
HDMI ver1.3 Receiver IP
HDMI Receiver Link IP Core supporting the standard of HDMI 1.3a, which will be quickly implemented into SoC of consumers; product (HD-TV, AV receiver....
1332
0.0
HDMI ver1.3 Transmitter IP
HDMI Transmitter Link IP Core supporting the standard of HDMI 1.3a which will be quickly implemented into SoC of consumers' product (HD-TV, AV receive...
1333
0.0
HDMI-DP Rx Whitebox Controller IP
This HDMI 1.4b and DisplayPort 1.2 Combo Rx Controller IP implements dual-mode display-link reception in synthesizable RTL. In HDMI mode, it performs ...
1334
0.0
HDMI-DP Rx Whitebox PHY IP - ST 28FDSOI
This ST 28FDSOI HDMI 1.4b and DisplayPort 1.2 Combo Rx PHY IP provides a selectable receiver front end for TMDS- and DisplayPort-based display links. ...
1335
0.0
HDMI-DP Tx Whitebox Controller IP
This HDMI 1.4b / DisplayPort 1.2 Combo Tx Controller IP combines source-side protocol generation for two widely deployed display interfaces. HDMI mode...
1336
0.0
HDMI2.1/2.0/1.4 PHY & Controller
INNOSILICON™ HDMI IP is designed for transmitting and receiving video and audio signals between the video source devices and display. It is fully comp...
1337
0.0
eDP Receiver IP
SmartDV's eDP Receiver IP is a silicon-proven, fully featured Embedded DisplayPort receiver solution purpose-built for SoC designs requiring reliable,...
1338
0.0
eDP Transmitter IP
SmartDV's eDP Transmitter IP is a silicon-proven, fully featured Embedded DisplayPort transmitter solution purpose-built for SoC designs requiring rel...
1339
0.0
eDP v1.5a RX PHY (14nm) 14LPU
The eDP RX PHY supports a maximum data rate of up to HBR3 (8.1Gbps), and the general mode supports a maximum data rate of up to 4Gbps. This core IP is...
1340
0.0
eDP v1.5a RX PHY (14nm) 14LPU
The eDP RX PHY supports a maximum data rate of up to HBR3 (8.1Gbps), and the general mode supports a maximum data rate of up to 4Gbps. This core IP is...
1341
0.0
eDP v1.5a RXPHY (14nm) 14LPU
The eDP RX PHY supports a maximum data rate of up to HBR3 (8.1 Gbps), and the general mode supports a maximum data rate of up to 4 Gbps. This core IP ...
1342
0.0
UDP/IP Hardware Protocol Stack - 100G
The Digital Blocks DB-UDP-IP-100GbE-AMBA is a UDP/IP Hardware Stack / UDP Off-load Engine (UOE) with low latency, high-performance targeting 100 GbE n...
1343
0.0
UDP/IP Hardware Protocol Stack - 10G
The Digital Blocks DB-UDP-IP-10GbE-AMBA is a UDP/IP Hardware Stack / UDP Off-load Engine (UOE) with low latency, high-performance targeting 10 GbE net...
1344
0.0
UDP/IP Hardware Protocol Stack - 1G
The Digital Blocks DB-UDP-IP-1GbE-AMBA is a UDP/IP Hardware Stack / UDP Off-load Engine (UOE) with low latency, high-performance targeting 10 GbE netw...
1345
0.0
UDP/IP Hardware Protocol Stack - 25G
The Digital Blocks DB-UDP-IP-25GbE-AMBA is a UDP/IP Hardware Stack / UDP Off-load Engine (UOE) with low latency, high-performance targeting 25 GbE net...
1346
0.0
UDP/IP Hardware Protocol Stack - 40G
The Digital Blocks DB-UDP-IP-40GbE-AMBA is a UDP/IP Hardware Stack / UDP Off-load Engine (UOE) with low latency, high-performance targeting 50 GbE net...
1347
0.0
UDP/IP Hardware Protocol Stack - 50G
The Digital Blocks DB-UDP-IP-50GbE-AMBA is a UDP/IP Hardware Stack / UDP Off-load Engine (UOE) with low latency, high-performance targeting 50 GbE net...
1348
0.0
eDP1.4 Transmitter PHY
Innosilicon eDP TX IP is designed to transmit video, audio and auxiliary data from system host device to a display device for display applications. I...
1349
0.0
Advanced Encryption Standard (AES-128) core with AMBA AHB interface
The GRAES core implements the Advanced Encryption Standard (AES) symmetric encryption algorithm for high throughput application (like audio or video s...
1350
0.0
Advanced Interface Bus Whitebox IP - ST 28FDSOI
The AIB IP Core serves as a die-to-die interconnect optimized for 32-bit AXI data transfer, enabling Master-to-Slave AXI transactions in either Master...