Design & Reuse
1891 IP
151
30.0
MIPI D-PHY CSI-2 RX+ (Receiver) IP in TSMC 28HPM
The MXL-DPHY-CSI-2-RX+ is a high frequency low-power, low-cost, source-synchronous, Physical Layer compliant with the MIPI Alliance Standard for D-PHY...
152
30.0
MIPI D-PHY Universal IP in UMC 28HPC+
The MXL-DPHY-UNIV-U-28HPC+ is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification for...
153
30.0
Display LVDS/MIPI D-PHY/sub-LVDS combo Transmitter 1.0G/2.5G/1.0Gbps 10-Lane
* The LVDS/Sub-LVDS/DPHY Combo TX converts parallel RGB data and 7/8/10 bits of CMOS parallel data into serial data streams. A phase-locked clock is t...
154
30.0
Universal Chiplet Interconnect Express (UCIe) Controller
Integrating multiple chiplets within a single package has become crucial for high-performance computing. CoMira’s UCIe (Universal Chiplet Interconnect...
155
30.0
USB2.0 PHY, 8-bit or a 16-bit parallel interface, remaining backward compatible with USB1.1 legacy protocol at 12Mbps
KA13UGUSB20ST001 is USB2.0 physical layer transceiver (PHY) integrated circuits. The PHY can be configured for either an 8-bit or a 16-bit parallel in...
156
29.0
USB V3.1 Power Delivery Type-C Port Evaluation board for OTI9108 IP
The OTS9106 board is a complete FPGA and ARM processor based USB PD Type-C port, featuring the RTL and C source code of the Obsidian Technology OTI910...
157
26.0
HDMI 2.0b IP Core
The Bitec HDMI 2.0b IP Core enables HDMI interconnectivity without the need for external HDMI ASSP devices. Supporting pixel clocks to 600Mhz, the IP ...
158
26.0
HDMI 2.1 IP Core
The Bitec HDMI 2.1b IP Core enables HDMI interconnectivity in FPGA or ASIC devices. Supporting uncompressed video formats to 8K60 4:2:0 and beyond for...
159
26.0
VESA Display Stream Compression (DSC) IP Core
Display Stream Compression offers inter-operable, visually lossless real-time, video compression to satisfy the emerging high bandwidth and high resol...
160
26.0
DisplayPort 1.4a IP Core
DisplayPort heralds a new alternative in video connectivity. Designed to enable low cost direct drive monitors and backed by industry leaders (Intel, ...
161
25.0
2.5Gbps Per Lane MIPI-CSI2 Compliant Serial Video Receiver
The SVRPlus supports a clock lane and 4 data lanes, each lane featuring at up to 2.5Gbps, for a total of 10Gbps. The highly parallel architecture of...
162
25.0
I3C Lite Advanced Controller
The I3C Advanced Controller Lite is a highly configurable I3C controller that can be used in microcontroller-based environments to provide I3C con...
163
25.0
I3C Lite Advanced Target
The I3C Advanced Target Lite is a highly configurable I3C Target that can be used in microcontroller based environments to provide I3C connectivit...
164
25.0
I3C V1.1 Advanced Controller
I3C is a new a standard from the MIPI Alliance that unifies and extends the legacy interfaces of I2C and SPI and adds new powerful features to sup...
165
25.0
I3C V1.1 Advanced Target
The I3C Advanced Target is a highly configurable I3C Target that can be used in microcontroller based environments to provide I3C connectivity to ...
166
25.0
I3C V1.1 Autonomous Target
The I3C Autonomous Target is intended for simple, data acquisition types of applications where a microprocessor is not needed to process the data....
167
25.0
PCIE Gen5 digital controller
Primeexpress PCIE Gen5 digital controller from Primesoc, is well architect,high performance, modular designed and tailor made to plug and play in SOCs...
168
25.0
PCIe Gen5/4 Retimer
Retimer that are Physical Layer protocol aware and that interoperate with any pair of Components with any compliant channel on each side of the Retime...
169
25.0
MIPI C-PHY v1.1
Combination MIPI CPHY-DPHY Analog Interface The MIPI C-PHY V1.0 improves throughput over a bandwidth limited channel, allowing more data without in...
170
25.0
MIPI C-PHY V1.1 TSMC 28nm HPC+
Combination MIPI CPHY-DPHY Analog Interface The MIPI C-PHY V1.1 improves throughput over a bandwidth limited channel, allowing more data without in...
171
25.0
MIPI C-PHY-D-PHY Combo PHY IP on TSMC 28nm HPC+
Combination MIPI CPHY-DPHY Analog Interface The MIPI C-PHY V1.0 improves throughput over a bandwidth limited channel, allowing more data without in...
172
25.0
MIPI C-PHY/D-PHY Combo CSI-2 TX+ IP 3.5Gsps/2.5Gbps
The MXL-CD-PHY-CSITX+-ST-28FDSOI is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificati...
173
25.0
MIPI C-PHY/D-PHY Combo CSI-2 TX+ IP 3.5Gsps/2.5Gbps
The MXL-CDPHY-3p5G-CSI-2-TX+-40LP is a high-frequency, low-power, low-cost, source synchronous, physical Layer supporting the MIPI Alliance Specificat...
174
25.0
MIPI CSI2 Transmit Controller
The Veriest Solutions MIPI CSI-2 v1.1 Transmit Controller facilitates transmission over a standard high-speed unidirectional serial interface between ...
175
25.0
MIPI CSI2 v1.3 Transmit Controller
The Veriest Solutions MIPI CSI-2 v1.3 Transmit Controller facilitates transmission over a standard high-speed unidirectional serial interface between ...
176
25.0
MIPI D-PHY 4-Lane CSI2-TX (Transmitter) in TowerJazz 65nm
The MXL-DPHY-0p2G-CSI-2-TX-T-180BCD is a high-frequency low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI Alliance Standard ...
177
25.0
MIPI D-PHY CSI-2 RX+ IP in TSMC 28HPC+ for Automotive Applications
The MXL-DPHY-CSI-RX+-T-28HPC+ is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification ...
178
25.0
MIPI D-PHY CSI-2 TX (Transmitter) in GlobalFoundries 22FDX
The MXL-DPHY-CSI-2-TX is a high-frequency low-power, low-cost, source synchronous, Physical Layer supporting the MIPI Alliance Specification for D-...
179
25.0
MIPI D-PHY CSI-2 TX+ (Transmitter) IP in TSMC 28HPC+
The MXL-DPHY-CSI-2-TX+-T028HPC+-RF-ULL is a high-frequency low-power, source-synchronous, physical layer supporting the MIPI Alliance Specification fo...
180
25.0
MIPI D-PHY CSI-2 TX+ (Transmitter) IP in TSMC 40ULP
The MXL-DPHY-CSI-2-TX+-T-40ULP is a high-frequency, low-power, low-cost, source synchronous physical Layer supporting the MIPI Alliance Specification ...
181
25.0
MIPI D-PHY V1.2@2.5GHz TSMC28nm HPC+
Arasan has the industry’s broadest portfolio of foundry and process technology support for MIPI D-PHY in the industry. The MIPI D-PHY analog IP is ava...
182
25.0
Flash SPI controller master/slave
Veriest's SPI Master Controller IP provides an industry standard data communication channel between the AMBA APB and SPI buses. It supports SPI master...
183
25.0
LPDDR5X/5/4X/4 Memory Controller IP
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
184
25.0
USB 2.0 On-chip oscillator, termination resistors, and DP/DM short circuit protection (0.18u)
The KA18USB20 consists of the digital and analog blocks of the USB Transceiver Macrocell (UTMI) specifications. This macrocell is certified and compli...
185
25.0
eUSB 2.0 PHY in TSMC (N5, N4P, N3E, N3P)
Synopsys provides designers with silicon-proven, configurable eUSB2 PHYs that are compliant with the USB-Implementers Forum (USB-IF) eUSB2 and USB 2.0...
186
25.0
CXL 2.0 Dual Mode Controller
CXL is high bandwidth, low latency interconnect lies between host processor and memory devices/accelerators or other network interface cards. CXL ca...
187
25.0
CXL Host Device Dual mode controllers
Primesoc's CXL IP supports dual mode of Host and device , integrated with PCIE Gen5 and well tested....
188
23.0
High voltage tolerant I/O
Overvoltage tolerant or undervoltage tolerant I/O circuits...
189
23.0
MIPI C-PHY TRx(80-2500Msps) / MIPI D-PHY TRx(80-4500Mbps) Combo PHY 5nm
The MIPI D-PHY/C-PHY Combo IP supports data rates of up to 4.5Gbps for D-PHY and 2.5Gsps for C-PHY. It operates in High-Speed (HS), Low-Power (LP), an...
190
23.0
MIPI C-PHY TRx(80-2500Msps) / MIPI D-PHY TRx(80-4500Mbps) Combo PHY 5nm
The MIPI D-PHY/C-PHY Combo IP supports data rates of up to 4.5Gbps for D-PHY and 2.5Gsps for C-PHY. It operates in High-Speed (HS), Low-Power (LP), an...
191
23.0
MIPI C-PHY TRx(80-8000Msps) / MIPI D-PHY TRx(80-9000Mbps) Combo PHY 4nm
The MIPI D-PHY/C-PHY Combo IP supports data rates of up to 9Gbps for D-PHY and 8Gsps for C-PHY. It operates in High-Speed (HS), Low-Power (LP), and Es...
192
23.0
Display Stream Compression (DSC 1.2) Decoder
The Trilinear Technologies Display Stream Compression (DSC) Decoder core offers realtime decompression of high-definition streams with resolutions fro...
193
23.0
Display Stream Compression (DSC 1.2) Encoder
The Trilinear Technologies Display Stream Compression (DSC) Encoder offers real-time compression of high-definition streams with resolutions up to 8K....
194
23.0
DisplayPort Receiver Link Controller
Our 5th generation DisplayPort Receiver Link Controller core supports DisplayPort 1.4, 2.0 and embedded DisplayPort 1.4b features, including link rate...
195
23.0
DisplayPort Transmitter Link Controller
Our 5th generation DisplayPort Transmitter Link Controller core supports DisplayPort 1.4, 2.0 and embedded DisplayPort 1.4b features, including link r...
196
23.0
MST Topology Management Stack
The Trilinear Technologies DisplayPort Multi-stream Transport (MST) Topology Management Software enables developers to accelerate software development...
197
20.0
1.8V/3.3V I2C in GF (12nm)
Synopsys Inter-Integrated Circuit (I2C) I/O library is used for two wire interfaces to connect low-speed devices like EEPROM, A/D, and D/A converters ...
198
20.0
10 Gigabit Ethernet MAC with IEEE 1588 PTP Support and AVB for Auto
The 10 Gigabit Ethernet Media Access Controller with IEEE 1588 PTP IP core is compliant to the Ethernet/IEEE 802.3-2008 standard and has hardware bas...
199
20.0
Camera SLVS-EC 2.0 Receiver 5.0Gbps 8-Lane
* The CL12812M8RIP5000 is an ideal means to link Camera Modules or CMOS Image Sensor (CIS) to ISP (Imaging Signal Processor) and DSP. The CL12812M8RI...
200
20.0
PCIe 2.0 PHY in Fujitsu (40nm)
The multi-channel Synopsys PHY IP for PCI Express® 2.1/1.1 includes Synopsys’ high-speed, high-performance transceiver to meet today’s demands for hig...