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1891 IP
1651
0.0
MIPI M-PHY in TSMC 65LP
The MXL-M-PHY-DIGRF is a high-frequency low-power, low-cost, Physical Layer IP that supports the MIPI® Alliance Standard for M-PHY and DigRF. The IP ...
1652
0.0
MIPI M-PHY Type 1 G5 2TX2RX in TSMC (N4P, N3E)
The silicon-proven Synopsys MIPI® M-PHY IP, compliant with the latest MIPI M-PHY v4.1 specification, supports multiple gears and a broad range of high...
1653
0.0
MIPI M-PHY Type 1 G5 2TX2RX, SR in TSMC (N3P)
The silicon-proven Synopsys MIPI® M-PHY IP, compliant with the latest MIPI M-PHY v4.1 specification, supports multiple gears and a broad range of high...
1654
0.0
MIPI M-PHY v3.1 IP, Silicon Proven in TSMC 28HPC+
The MIPI M-PHY Gear 3 IP is compliant with the latest MIPI Feature Storage IP Solution SerDes PHY Product Brief Alliance M-PHY v3.0 Specification, Uni...
1655
0.0
MIPI M-PHY v3.1 IP, Silicon Proven in UMC 40LP
The most recent MIPI Feature Storage IP Solution SerDes PHY Product Brief Alliance M-PHY v3.0 Specification, UniPro v1.8 Specification, and Universal ...
1656
0.0
MIPI M-PHY v4.1 IP, Silicon Proven in TSMC 12FFC
The MIPI M-PHY Gear 4 IP is compliant with the latest MIPI Feature Storage IP Solution SerDes PHY Product Brief Alliance M-PHY v4.1 Specification, Uni...
1657
0.0
MIPI M-PHY v4.1 IP, Silicon Proven in TSMC 28 HPC+
The most recent MIPI Feature Storage IP Solution SerDes PHY Product Brief Alliance M-PHY v4.1 Specification, UniPro v1.8 Specification, and Universal ...
1658
0.0
MIPI M-PHY v4.1 IP, Silicon Proven in TSMC 40 LP
The MIPI M-PHY Gear 4 IP is compatible with the most recent MIPI Feature Storage IP Solution SerDes PHY Product Brief Alliance M-PHY v4.1 Specificatio...
1659
0.0
MIPI M-PHY v4.1 IP, Silicon Proven in TSMC 55 ULP
The most recent MIPI Feature Storage IP Solution SerDes PHY Product Brief Alliance M-PHY v4.1 Specification, UniPro v1.8 Specification, and Universal ...
1660
0.0
MIPI M-PHY v4.1 IP, Silicon Proven in UMC 28 HPC
The MIPI M-PHY Gear 4 IP is compatible with the most recent MIPI Feature Storage IP Solution SerDes PHY Product Brief Alliance M-PHY v4.1 Specificatio...
1661
0.0
MIPI PLL
The MXL-PLL-MIPI-PXL is a high performance PLL based frequency synthesizer implemented using digital CMOS technology. It is highly integrated and requ...
1662
0.0
MIPI RFFE Slave IP
MIPI RFFE Slave interface provides full support for the two-wire MIPI RFFE synchronous serial interface, compatible with RFFE specification. Through i...
1663
0.0
MIPI RFFE SPI I2C Slave IP
MIPI RFFE SPI I2C Slave interface provides full support for the two-wire MIPI RFFE synchronous serial interface with SPI and I2C overlay, compatible w...
1664
0.0
MIPI RFFE SPI Slave IP
MIPI RFFE SPI Slave interface provides full support for the two-wire MIPI RFFE synchronous serial interface with SPI overlay, compatible with RFFE 2.1...
1665
0.0
MIPI SoundWire Master IP
The SmartDV MIPI SOUNDWIRE MASTER IIP Core is full-featured, easy-to-use, synthesizable design that is easily integrated into any SoC or FPGA developm...
1666
0.0
MIPI Soundwire PHY
The physical layer block implements all the line-side functions such as NRZI encoding & decoding, bus clash detection, data line buffer enable/disable...
1667
0.0
MIPI SoundWire Slave IP
The SmartDV MIPI SOUNDWIRE SLAVE IIP Core is full-featured, easy-to-use, synthesizable design that is easily integrated into any SoC or FPGA developme...
1668
0.0
MIPI SPMI 2.0 Device IP
Arasan’s SPMI Device IP (Configurable Controller Cores) implements MIPI SPMI2.0 protocols. It is designed to be configured as a SPMI Host, SPMI Device...
1669
0.0
MIPI SPMI 2.0 Host IP
Arasan’s SPMI Host IP (Configurable Controller Cores) implements MIPI SPMI2.0 protocols. It is designed to be configured as a SPMI Host, SPMI Device C...
1670
0.0
MIPI SPMI Master IP
MIPI SPMI Master interface provides full support for the two-wire MIPI SPMI synchronous serial interface, compatible with SPMI specification. Through ...
1671
0.0
MIPI SPMI Slave AHB Bridge IP
MIPI SPMI Slave AHB Bridge interface provides full support for the two-wire MIPI SPMI synchronous serial interface, compatible with SPMI specification...
1672
0.0
MIPI SPMI Slave AXI Bridge IP
MIPI SPMI Slave AXI Bridge interface provides full support for the two-wire MIPI SPMI synchronous serial interface, compatible with SPMI specification...
1673
0.0
MIPI SPMI Slave DMA IP
MIPI SPMI Slave DMA interface provides full support for the two-wire MIPI SPMI synchronous serial interface, compatible with SPMI specification. Throu...
1674
0.0
MIPI STP Master IP
MIPI STP Master interface provides full support for the PTI which is a generic high performance parallel interface, support for the two-wire MIPI_STP ...
1675
0.0
MIPI Testbench
Rambus MIPI Testbench from Rambus emulates a MIPI device enabling end-to-end simulation of a MIPI design. This includes the follow features: • Separ...
1676
0.0
MIPI UFS v2.1 Host Controller IP, Compatible with M-PHY and Unipro
UFS is a high performance, serial interface used in mobile systems to help communicate between host processor and mass storage devices like flash and ...
1677
0.0
MIPI UFS v3.1 Device Controller IP, Compatible with M-PHY and Unipro
UFS is a high performance, serial interface used in mobile systems to help communicate between host processor and mass storage devices like flash and ...
1678
0.0
MIPI UFS v3.1 Host Controller IP, Compatible with M-PHY and Unipro
Our Universal Flash Storage (UFS) Controller IP is compliant with the latest JEDEC UFS v3.1 specification. The UFS standard is a high performance, low...
1679
0.0
MIPI UniPro IP
MIPI UNIPRO compatible with MIPI UNIPRO version 1.8 specification. Through its compatibility, it provides a simple interface to a wide range of low-co...
1680
0.0
MIPI Unipro v1.6 Controller IP, Compatible with M-PHY and UFS
UniPro (Unified Protocol) is a layered protocol defined by the MIPI Alliance for connecting devices and components within a mobile device. UniPro allo...
1681
0.0
MIPI Unipro v1.8 Controller IP, Compatible with M-PHY and UFS
This MIPI UniPro Controller IP is compliant with the latest MIPI UniPro v1.8 specification, provides the capability to control the UniPro link over a ...
1682
0.0
Display LVDS single link/dual link Transmitter 1.12Gbps 8-Lane
* The CL12491M8TIP160 transmitter converts parallel RGB data and 4bits of HYNC,VSYNC,DE and Control) of CMOS parallel data into serial LVDS data strea...
1683
0.0
Display Port 1.2 Tx PHY & Controller IP (Silicon Proven in STMicro 28FDSOI)
Our Display Port is VESA DP1.1a, DP1.2 and eDP compliant with four main lanes and an auxiliary channel The DP transmitter acceptsDP1.1a HBR (2.7Gbps) ...
1684
0.0
Display Port 1.4 Rx PHY & Controller IP (Silicon Proven in IDM 180nm /150nm)
Display port 1.4 Rx IP supports Channel bandwidth Up to 5.4bps per channel (HBR2), Programmable analog characteristics like CDR Bandwidth, Equalizer s...
1685
0.0
Display Port Receiver IP
Display Port Receiver core is compliant with Display Port version 2.0 specification. Through its compatibility, it provides a simple interface to a w...
1686
0.0
Display Port Transmitter IP
Display Port Transmitter core is compliant with Display Port version 2.0 specification. Through its compatibility, it provides a simple interface to ...
1687
0.0
Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in TSMC 28HPC+
Display port 1.4 Rx IP supports Channel bandwidth Up to 5.4bps per channel (HBR2), Programmable analog characteristics like CDR Bandwidth, Equalizer s...
1688
0.0
Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in TSMC 40LP
This Display Port v1.4 Rx PHY IP Core supports Channel capacity, offering programmable analog characteristics like CDR Bandwidth, Equalizer Strength, ...
1689
0.0
Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in UMC 28HPC
The capacity of the Display Port 1.4 Rx IP Channel is supported. Up to 5.4bps per channel (HBR2), programmable analogue parameters like CDR Bandwidth,...
1690
0.0
Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in UMC 40SP
The Display Port 1.4 Rx IP Channel's maximum capacity is supported. Programmable analogue parameters including CDR Bandwidth, Equalizer Strength, Term...
1691
0.0
Display Port v1.4 Rx PHY & Controller IP, Silicon Proven in UMC 55SP
The maximum capacity of the Display Port 1.4 Rx IP Channel is supported. Up to 5.4bps per channel, programmable analogue settings such as CDR Bandwidt...
1692
0.0
Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 28HPC+
The DisplayPort transmitter PHY version 1.4 supports data rates between 1.62Gbps (RBR) to 5.4Gbps (HBR2). built-in equalizer with programmable analogu...
1693
0.0
Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 40LP
Data rates for the DisplayPort transmitter PHY version 1.4 range from 1.62Gbps (RBR) to 5.4Gbps (HBR2). Integrated 100-ohm termination resistors, a bu...
1694
0.0
Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in UMC 28HPC
The DisplayPort transmitter PHY version 1.4 supports data rates between 1.62Gbps (RBR) to 5.4Gbps (HBR2). built-in equalizer with programmable analogu...
1695
0.0
Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in UMC 40SP
Version 1.4 of the DisplayPort transmitter PHY is capable of transmitting data at rates of 1.62Gbps (RBR) to 5.4Gbps (HBR2). programmable analogue fea...
1696
0.0
Display Port v1.4 Tx PHY & Controller IP, Silicon Proven in UMC 55SP
The DisplayPort transmitter PHY version 1.4 can transmit data at rates between 1.62Gbps (RBR) to 5.4Gbps (HBR2). Common-mode biassing of the CDR bandw...
1697
0.0
BitBLT Graphics Hardware Accelerator (AXI4 Bus)
The Digital Blocks DB9100AXI4 BitBLT Graphics Hardware Accelerator Verilog IP Core renders a graphics frame by generating new bitmaps from commands to...
1698
0.0
Slave I2C bus controller with FIFO
The DI2CS core provides an interface between a microprocessor / microcontroller and I2C bus. It can work as: - a slave transmitter or - slave receiv...
1699
0.0
GLink AXI Wrapper
GLink (GLink-fs 2.x + PCS-replay) AXI Wrapper is a digital IP designed to support AMBA AXI3/AXI4 compliant bus of user interface and provide data bus ...
1700
0.0
GLink CXS-Bridge
GLink (GLink-fs 2.x + PCS-replay) CXS-Bridge is a digital IP to interconnect between two dies that use Glink as a physical layer and provides AMBA CXS...