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1891 IP
1801
0.0
USB 3.1 Gen1 / Gen2 Device Controller IP
USB 3.1 Device controller is a highly configurable core and implements the USB 3.1 Device functionality that can be interfaced with third party USB 3....
1802
0.0
USB 3.1 Gen1 / Gen2 Host Controller IP
USB 3.1 Host Controller is compliance with USB3.1 specification, Revision 1.0 and all associated ECN’s, USB specifications Rev 2.0 and all associated ...
1803
0.0
USB 3.1 Gen1/Gen2 PHY IP, Silicon Proven in SMIC 14SF+
With this PHY IP, it supports both USB 3.1 Gen1 and Gen2. By providing an integrated self-test module, a whole on-chip physical transceiver solution w...
1804
0.0
USB 3.1 Gen1/Gen2 PHY IP, Silicon Proven in TSMC 28HPC+
This PHY IP supports both USB 3.1 Gen1 & Gen2. By providing a full on-chip physical transceiver solution with Electro Static Discharge (ESD) protectio...
1805
0.0
USB 3.1 Gen1/Gen2 PHY IP, Silicon Proven in UMC 28HPC
It supports both USB 3.1 Gen1 and Gen2 with this PHY IP. By offering a complete on-chip physical transceiver solution with built-in jitter injection, ...
1806
0.0
USB 3.1 Type-C PHY IP, Silicon Proven in SMIC 12SF++
A high performance, high-speed SERDES IP known as USB3.1Type-C PHY was created for semiconductors that allow high bandwidth data transfers while using...
1807
0.0
USB 3.1 Type-C PHY IP, Silicon Proven in SMIC 14SF+
The USB3.1Type-C PHY is a high-performance, high-speed SERDES IP designed for semiconductors that support low-power, high-bandwidth data transfers. Th...
1808
0.0
USB 3.1 Type-C PHY IP, Silicon Proven in SMIC 55LL
The USB3.1Type-C PHY is a high-speed, SERDES IP with high performance that was created for semiconductors that allow high-bandwidth, low-power data tr...
1809
0.0
USB 3.1 Type-C PHY IP, Silicon Proven in TSMC 55ULP
USB3.1Type-C PHY IP is a high performance high speed SERDES IP designed for chips that perform high bandwidth data communication while operating at lo...
1810
0.0
USB 3.2 Gen2 PHY IP, Silicon Proven in TSMC 12FFC
All USB 3.2 Gen2X1 host and peripheral applications are supported up to 10Gbps by the USB 3.2 Gen2X1 transceiver IP. It complies with UTMI+ and PIPE4....
1811
0.0
USB 3.2 Gen2 PHY IP, Silicon Proven in TSMC 16FFC
The USB 3.2 Gen2X1 transceiver IP supports all USB 3.2 Gen2X1 host and peripheral applications up to 10Gbps. It conforms with the standards of UTMI+ a...
1812
0.0
USB 3.2 Gen2 PHY IP, Silicon Proven in TSMC 28HPC+
All USB 3.2 Gen2X1 host and peripheral applications up to 10Gbps are supported by the USB 3.2 Gen2X1 transceiver IP. It complies with UTMI+ and PIPE4....
1813
0.0
USB 3.2 Gen2 PHY IP, Silicon Proven in TSMC 7FF
The USB 3.2 Gen2X1 transceiver IP offers all USB 3.2 Gen2X1 host and peripheral applications up to 10Gbps. Both the UTMI+ and PIPE4.0 specifications a...
1814
0.0
USB 3.2 Gen2 PHY IP, Silicon Proven in UMC 28HPC
The USB 3.2 Gen2X1 transceiver IP supports all USB 3.2 Gen2X1 host and peripheral applications up to 10Gbps. It conforms with the standards of UTMI+ a...
1815
0.0
USB 3.2/ PCIe 3.1/ SATA 3.2 Combo PHY IP, Silicon Proven in UMC 28HPC
The combo PHY consist of Peripheral Component Interconnect Express (PCIe) compliant with PCIe 3.1 Base Specification with support of PIPE v4.4 interfa...
1816
0.0
USB 3.x Device IP
USB 3.x Device interface provides full support for the USB3.x synchronous serial interface, compatible with USB 3.0/3.1/3.2 specification. Through its...
1817
0.0
USB 3.x Hub IP
USB 3.x HUB interface provides full support for the USB3.x synchronous serial interface, compatible with USB 3.0/3.1/3.2 specification. Through its US...
1818
0.0
USB 3.x OTG IP
USB 3.x OTG interface provides full support for the USB3.x synchronous serial interface, compatible with USB 3.0/3.1/3.2 specification. Through its US...
1819
0.0
USB 3.x PHY for TSMC
Proven PHY IP for USB Device, Host, and DRD with small footprint and low active power The ubiquity of USB 3.x in devices makes it nearly mandatory fo...
1820
0.0
USB BCK Technology (22nm, 40nm, 55nm, 110nm)
In USB product series, M31 not only provides customers with a standard USB PHY solution, but also offers a unique BCK function. M31’s patented BCK (Bu...
1821
0.0
USB PD IP
USB PD interface provides full support for the USB PD synchronous serial interface, compatible with USB 3.1/3.0/2.0 and 1.0 specifications. Through it...
1822
0.0
USB Type-C and Power deliver Controller
USB Type-C and Power deliver Controller...
1823
0.0
USB Type-C IP
USB TYPE C interface provides full support for the USB TYPE C synchronous serial interface, compatible with USB 3.0/2.0 and 1.0 specifications. Throug...
1824
0.0
USB-C 3.1 SS/SSP PHY, Type-C IP (Silicon proven in UMC 55SP/ EF)
A high performance, high-speed SERDES IP called USB3.1Type-C PHY is created for semiconductors that provide high bandwidth data connection while using...
1825
0.0
USB-C 3.2 DP/TX PHY AR in TSMC (N3P)
The Synopsys USB-C 3.2/DisplayPort 1.4 IP solution consists of USB-C 3.2/DisplayPort 1.4 PHYs, USB-C 3.2/DisplayPort 1.4 controllers (Device, Host, or...
1826
0.0
USB1.1 PHY in SMIC 55PFULP
Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...
1827
0.0
USB2.0 OTG IP
This IP is developed as the USB2.0 OTG PHY. This PHY consists of an analog PHY and a PCS layer. The PCS section includes basic encoding and decoding a...
1828
0.0
USB2.0 OTG PHY in SMIC 0.11G
Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...
1829
0.0
USB2.0 OTG PHY in SMIC 0.13EF
Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...
1830
0.0
USB2.0 OTG PHY in SMIC 0.13G
Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...
1831
0.0
USB2.0 OTG PHY in SMIC 28HKC+
Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...
1832
0.0
USB2.0 OTG PHY in SMIC 28HKD 0.9/1.8V
Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...
1833
0.0
USB2.0 OTG PHY in SMIC 28HKD 0.9/2.5V
Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...
1834
0.0
USB2.0 OTG PHY in SMIC 40NEF
Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...
1835
0.0
USB2.0 OTG PHY in SMIC 40NLL
Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...
1836
0.0
USB2.0 OTG PHY in SMIC 55EF
Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...
1837
0.0
USB2.0 OTG PHY in SMIC 55NLL
Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design. ...
1838
0.0
USB3.x Host IP
USB3.x Host interface provides full support for the USB3.x synchronous serial interface, compatible with USB 3.0/3.1/3.2 specification. Through its US...
1839
0.0
USB4 PHY - SS SF2, North/South Poly Orientation
The Synopsys USB4 IP solution is based on the USB4 specification from the USB Implementer Forum (USB-IF). The USB4 IP offering includes device router,...
1840
0.0
USB4 PHY IP for TSMC N3E
The Synopsys USB4 IP solution is based on the USB4 specification from the USB Implementer Forum (USB-IF). The USB4 IP offering includes device router,...
1841
0.0
DSC 1.2b Decoder
The DSC 1.2b Decoder is an efficient video decompression IP that complies with the VESA Display Stream Compression (DSC) 1.2b standard. Optimized for ...
1842
0.0
DSC 1.2b Encoder
The DSC 1.2b Encoder is an efficient video compression IP that complies with the VESA Display Stream Compression (DSC) 1.2b standard. Optimized for lo...
1843
0.0
ASIL-B Ready ISO 26262 Certified VESA DisplayPort 1.4 Forward Error Correction (FEC) Transmitter
The DisplayPort Forward Error Correction (FEC) Transmitter IP Core implements Reed-Solomon FEC and symbol interleaving as specified by the VESA Displa...
1844
0.0
TSMC CLN12FFC Lane-based 1.5 - 16 Gbps Enterprise Multi-Standard SerDes
The GUC's EMS-PHY SerDes supports multiple high speed wire-line communication standards. Supported standards include PCIe Gen1-Gen4,SAS-3 G1-G4, SATA-...
1845
0.0
TSMC CLN28HPC+ Derivative IP of IGASERT06A Enterprise Multi-Standard SerDes
The GUC's Quad-Lane EMS-XT PHY SerDes supports multiple high speed wire-line communication standards. Supported standards include CEI-28G-VSR, CEI-25G...
1846
0.0
TSMC CLN3FFE GLink 2.3LL Die-to-Die PHY
IGPD2DZO1A is a high-speed Die-to-Die interface PHY that transmits data through TSMC advanced packaging solutions, Integrated Fan-Out (InFO) with the ...
1847
0.0
TSMC CLN5FF GLink 2.0 Die-to-Die PHY
IGPD2DY01A is a high-speed Die-to-Die interface PHY that transmits data through TSMC advanced packaging solutions: Integrated Fan-Out (InFO) with RDL ...
1848
0.0
TSMC CLN5FF GLink 2.3LL Die-to-Die PHY
IGAD2DY04A is a high-speed die-to-die interface PHY which transmits data through TSMC advanced packaging solutions: Integrated Fan-Out (InFO) with RDL...
1849
0.0
TSMC CLN5FF GLink GPIO
IGID2DY01A GLink GPIO is one of the GLink series IPs. It provides low speed (up to 500 MHz) connection between two dies without requiring any initiali...
1850
0.0
TSMC CLN5FF GLink-3D Die-to-Die Master PHY
IGAD2DY02A is a GLink-3D high speed die-to-die interface Master PHY. It is used to transmit data between dies and assembled using TSMC System on Integ...