Design & Reuse
1928 IP
1601
0.0
Synopsys USB4 PHY IP for TSMC N4P
The Synopsys USB4 IP solution is based on the USB4 specification from the USB Implementer Forum (USB-IF). The USB4 IP offering includes device router,...
1602
0.0
Automotive-Compliant Synopsys UCIe Controller IP
Synopsys UCIe Controller IP is comprised of the Die-to-Die Adapter layer and Protocol layer for widely used protocols such as PCI Express and CXL. The...
1603
0.0
MIPI C-PHY DSI RX (Transmitter/Host) IP in TSMC 22ULL
The MXL-CPHY-2p5G-DSI-RX-T-22ULL is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificati...
1604
0.0
USB2.0 Full-Speed Transceiver
The Renesas USB2.0 FS(Full-Speed) Transceiver is useful analog 1port transceiver hard macro for TSMC 22nm ULL process. This macro can be configured to...
1605
0.0
Synopsys 112G PHY for TSMC N7
Synopsys IP Multi-Protocol 112G PHY IP is part of Synopsys’ high- performance multi-rate transceiver portfolio for high-end networking and high perfor...
1606
0.0
I2C Slave Controller w/FIFO (AXI Bus)
The Digital Blocks DB-I2C-S-AXI Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC or other high performance microprocessor via the AMBA 4/3 AXI...
1607
0.0
SWI3S Manager core IP
Arasan’s SWI3S (SoundWire I3S Interface) Manager Controller Core IP implements the link protocol to communicate in half-duplex fashion to transfer the...
1608
0.0
SWI3S Peripheral core IP
Arasan’s SWI3S (SoundWire I3S Interface) Peripheral Controller Core IP implements the link protocol to communicate in half-duplex fashion to transfer ...
1609
0.0
MIPI D-PHY DSI RX (Receiver) in GlobalFoundries 22FDX+
The MXL-DPHY-2p5-DSI-RX-GF-22FDX+ is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificat...
1610
0.0
PCIe 6.0 PHY
Multi-Gigabit/s serial transceivers are fast replacing older parallel interfaces in most of applications. The accelerating demand for higher data rate...
1611
0.0
Synopsys PCIe 7.0 PHY IP for TSMC N3P
The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 7.0 meets today’s demands for higher bandwidth and power efficiency across backplane, and c...
1612
7.5
USB 3.0 Host Controller (Exclusively for Turnkey ASIC design; not for standalone licensing)
USB3.0 Host Controller IP core provides an integrated and customizable solution for USB3.0 Host applications. The Core supports USB3.0/2.0 Specificati...
1613
7.5
USB 3.0 Device Controller (Exclusively for Turnkey ASIC design; not for standalone licensing)
USB3.0 Device Controller IP Core provides an integrated and customizable solution for USB3.0 Device applications. The Core is compliant with USB3.0/2....
1614
7.5
USB 3.0 Retimer (Exclusively for Turnkey ASIC design; not for standalone licensing)"
USB3.0 Retimer softcore is designed for use USB Port/Cable Retimer applications. The requirements set forth in the specification comprehend the use of...
1615
7.5
USB 2.0 Host controller (Exclusively for Turnkey ASIC design; not for standalone licensing)
USB 2.0 Host Controller supports high (480 Mbps), full (12 Mbps) and low (1.5 Mbps) speed operation. Supports Control, Bulk, Isochronous and Interrupt...
1616
7.5
USB 2.0 Device controller (Exclusively for Turnkey ASIC design; not for standalone licensing)
USB 2.0 Device controller implements a complete high/full speed peripheral controller that interfaces UTMI USB port transceiver on one side and to an ...
1617
0.0
I2C Slave Controller w/FIFO (APB Bus)
The Digital Blocks DB-I2C-S-APB Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC or other high performance microprocessor via the AMBA 2.0 APB...
1618
7.5
I2C Master/Slave Controller (Exclusively for Turnkey ASIC design; not for standalone licensing)
I2C slave enables communication with an I2C master using the standard I2C protocol. It is designed for easy integration into SoC, such as sensors or m...
1619
7.5
SPI Master/Slave Controller (Exclusively for Turnkey ASIC design; not for standalone licensing)
SPI Controller IP enables synchronous serial communication with slave or master peripherals. It has Generic interface which programs the control and d...
1620
7.5
UART/Serial Port (Exclusively for Turnkey ASIC design; not for standalone licensing)
The Serial Port IP (RS232, RS422, RS485) is a Single Port Standalone IP, which supports all the features in the modes like 16C450, 16C550, 16C550Ex, 1...
1621
7.5
IEEE1284 Parallel Port Controller (Exclusively for Turnkey ASIC design; not for standalone licensing)
The IEEE1284 compliant parallel port controller supports faster data rates up to 2.0Mbytes/sec. It supports Nibble mode, Byte Mode, EPP, and ECP. Auto...
1622
7.5
Generic GPIO Controller (Exclusively for Turnkey ASIC design; not for standalone licensing)
General Purpose I/O pins are used for system control and connection of various devices. This (GPIO) controller provides dedicated general-purpose pins...
1623
0.0
Synopsys 224G Ethernet PHY IP for TSMC N3P
The Synopsys 224G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency need...
1624
7.0
MIPI RX PHY in SMIC28nm
MIPI RX PHY is a mass production IP for D-PHY v1.2 and C-PHY v1.2 protocols. It includes a total of 5 Lanes, among which there are 4 data lanes and 1...
1625
7.0
MIPI RX controller in SMIC28nm
MIPI RX controller is a mass production IP in SMIC 28nm supported MIPI DSI & DCS protocols....
1626
20.0
USB 3.0 PHY in TSMC (65nm, 55nm, 40nm, 28nm)
The Synopsys USB-C™ 3.0 and USB 3.0 femtoPHY IP provide designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer a...
1627
0.0
I2C Slave Controller w/FIFO (AHB Bus)
The Digital Blocks DB-I2C-S-AHB Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC or other high performance microprocessor via the AMBA 2.0/3.0...
1628
7.0
DSC decoder IP
DSC decoder IP is compliant with standard VESA Display Stream Compression version 1.1/1.2/1.2a....
1629
0.0
I2S to AHB bridge, following AMBA4 specifications
dos_I2S_AHB_bridge is an I2S to AHB bridge, following AMBA4 specifications...
1630
0.0
Parallel to AHB bridge, following AMBA4 specifications
dos_parallel_AHB_bridge is a Parallel to AHB bridge, following AMBA4 specifications...
1631
4.0
PCIe 4.0 PHY (4nm)
The PCIe PHY IP consists of hard macro PMA and soft macro PCS compliant with PCIe Base 4.0 specification. This IP offers a cost-effective and low-powe...
1632
2.0
Multi-Standard SerDes PHY (4nm)
The MSS PHY IP consists of a hard macro PMA architecture supporting multi-standard NRZ signaling up to 20 Gbps, compliant with PCIe Gen4, DisplayPort ...
1633
2.0
USB Super Speed+ PHY (4nm)
The USB PHY IP consists of a hard macro PMA and soft macro PCS compliant with USB 3.2 specification, supporting SuperSpeed+ (10 Gbps) operation. This ...
1634
1.0
SLVS-EC 2.0 RX PHY (14nm)
The SLVS-EC Receiver PHY IP consists of a hard macro architecture compliant with SLVS-EC version 2.0 specification, supporting data rate up to 10 Gbps...
1635
1.0
SLVS-EC 3.0 RX PHY (4nm)
The SLVS-EC Receiver PHY IP consists of a hard macro architecture compliant with SLVS-EC version 3.0 specification, supporting data rate up to 10 Gbps...
1636
1.0
eDP v1.5a RXPHY (14nm)
The eDP RX PHY supports a maximum data rate of up to HBR3 (8.1 Gbps), and the general mode supports a maximum data rate of up to 4 Gbps. This core IP ...
1637
1.0
DP 2.1a / eDP v1.5a RXPHY (4nm)
The DP/eDP RX PHY supports a maximum data rate of up to HBR3 (8.1 Gbps), and the general mode supports a maximum data rate of up to 4 Gbps. This core ...
1638
0.0
UDP/IP Hardware Protocol Stack - 100G
The Digital Blocks DB-UDP-IP-100GbE-AMBA is a UDP/IP Hardware Stack / UDP Off-load Engine (UOE) with low latency, high-performance targeting 100 GbE n...
1639
0.0
32G SerDes PHY IP in 28nm
The 32G SerDes IP enables ultra-fast serial communication at up to 32 Gbps per channel, providing a scalable and production-ready solution for high-pe...
1640
0.0
112G Serdes PHY IP in 5nm
The 112 Gbps SerDes PHY IP Core, natively developed in 5 nm FinFET, unlocks unmatched serial speeds for SoC interconnects, supporting both PAM4 (56–11...
1641
0.0
112G SerDes IP Core in 6nm
The 112G SerDes PHY IP Core in 6nm offers best-in-class serial link performance for advanced SoC designs. Supporting multi-rate operation from 1 Gbps ...
1642
0.0
112G SerDes PHY IP in 12nm
The 112G SerDes PHY IP Core, fabricated in 12nm FinFET technology, delivers scalable high-speed connectivity for modern SoC platforms. Supporting up t...
1643
1.0
DP 1.4 / eDP v1.4b TXPHY (14nm)
The eDP v1.4b TX PHY IP consists of a hard macro architecture supporting embedded DisplayPort v1.4 specification with data rates up to 8.1 Gbps per la...
1644
1.0
DP 1.4 / eDP v1.4b TXPHY (4nm)
The eDP v1.4b TX PHY IP consists of a hard macro architecture supporting embedded DisplayPort v1.4 specification with data rates up to 8.1 Gbps per la...
1645
1.0
DP 1.4 / eDP v1.4b TXPHY (8nm)
The eDP v1.4b TX PHY IP consists of a hard macro architecture supporting embedded DisplayPort v1.4 specification with data rates up to 8.1 Gbps per la...
1646
5.0
PCIe 6.0 PHY (8nm)
The PCIe PHY IP consists of hardmacro PMA and softmacro PMD compliant to PCIe Base 6.x specification. This IP offers a cost-effective and low-power so...
1647
5.0
PCIe 6.x and 56G Ethernet Combo PHY (8nm)
The SERDES PHY includes the functions of both PCIe PHY and Ehternet PHY. The PCIe PHY IP consists of hardmacro PMA and softmacro PMD compliant to PCIe...
1648
15.0
3.3V general purpose I/O for 4nm FinFET
The Sofics 3.3V capable GPIO is an IP macro for on-chip integration. It is a 3.3V general purpose I/O built with a stack of 1.2V (1.5V overdrive) MOS ...
1649
0.0
I2C/SMBus Master/Slave Controller w/FIFO (AXI/AHB/APB)
The Digital Blocks DB-I2C-SMBus-MS-AMBA Controller IP Core is an I2C/SMBus Master/Slave Controller, interfacing a microprocessor via the AMBA AXI, AHB...
1650
15.0
ASA-ML Serdes IP Core in 28nm
The ASA PHY IP Core in 28nm provides scalable and robust SerDes connectivity for advanced automotive SoCs. Supporting the Automotive SerDes Alliance s...