1601 0.0

MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in Samsung (SF5A, SF4A) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

1602 0.0

MIPI C-PHY v2.0 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (N7) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

1603 0.0

eUSB 2.0 PHY in TSMC (N3A) for Automotive Synopsys provides designers with silicon-proven, configurable eUSB2 PHYs that are compliant with the USB-Implementers Forum (USB-IF) eUSB2 and USB 2.0...

1604 0.0

HDMI 2.1/DisplayPort 2.1 TX PHY in Samsung (SF5A) The Synopsys HDMI 2.1 TX Controller and PHY IP solutions,compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide the...

1605 0.0

MIPI C-PHY v2.0 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (N7, N6) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

1606 0.0

MIPI D-PHY Rx-Only 2 Lanes in Samsung (8nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

1607 3.0

2D Graphics Hardware Accelerator (AXI4 Bus) The DB9200AXI4 2D Graphics Engine Verilog IP Core targets low VLSI footprint, high-performance hardware accelerated graphics applications. The DB92...

1608 0.0

MIPI D-PHY Rx-Only 4 Lanes in Samsung (8nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

1609 0.0

MIPI D-PHY Tx-Only 2 Lanes in Samsung (8nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

1610 0.0

MIPI M-PHY Type 1 G5 2TX2RX in TSMC (N6, N4P, N3E) The silicon-proven Synopsys MIPI® M-PHY IP, compliant with the latest MIPI M-PHY v4.1 specification, supports multiple gears and a broad range of high...

1611 0.0

MIPI M-PHY Type 1 G5 2TX2RX, SR in TSMC (N3P) The silicon-proven Synopsys MIPI® M-PHY IP, compliant with the latest MIPI M-PHY v4.1 specification, supports multiple gears and a broad range of high...

1612 0.0

PCIe 3.0 PHY in TSMC (28nm, 12nm, N4P) The multi-channel Synopsys PHY IP for PCI Express® 3.1 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...

1613 0.0

USB-C 3.2 DP/TX PHY AR in TSMC (N3P) The Synopsys USB-C 3.2/DisplayPort 1.4 IP solution consists of USB-C 3.2/DisplayPort 1.4 PHYs, USB-C 3.2/DisplayPort 1.4 controllers (Device, Host, or...

1614 0.0

Synopsys Auto-Grade MIPI D-PHY Tx for TSMC N7 Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

1615 0.0

Synopsys MIPI C-PHY v2.0 D-PHY v2.1 RX 2 trios/2 Lanes for TSMC N5 Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

1616 3.0

I2C Slave Controller w/FIFO (APB or AHB or AHB-Lite or AXI-Lite Bus) The Digital Blocks DB-I2C-S-APB / DB-I2C-S-AHB / DB-I2C-S-AXI / DB-I2C-S-AVLN Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC,NIOS II or othe...

1617 9.0

USB IP ...

1618 9.0

USB 2.0 Device, Software based enumeration RAM Interface (USB20SR) The USB20SR is a USB 2.0 Device, Software based enumeration RAM Interface IP Core. The core is RAM based with 32-bit Avalon interface and supports ULP...

1619 9.0

USB 2.0 Device with FIFO Interface (USB20HF) The USB 2.0 Device with FIFO Interface (USB20HF) IP Core supports ULPI interface with Bulk IN and Bulk OUT endpoints. The core supports three preconfi...

1620 9.0

USB 2.0 Host Controller The USB 2.0 Host Controller (USB20HC) IP Core is a 32-bit Avalon interface compliant core and supports ULPI interface. The core supports High Speed (4...

1621 9.0

I2C Controller I²C (Inter-Integrated Circuit) Controller is a two-wire, bi-directional serial bus that provides simple and efficient method of data transmission over...

1622 9.0

USB 20Gbps Device Controller Leveraging the benefits of USB 10Gbps and 5Gbps device controller, USB 20Gbps is designed using the FPGA built-in transceiver. It is a one-stop soluti...

1623 0.0

Synopsys 32G PHY NCS for TSMC N5 The multi-lane Synopsys Multi-Protocol 32G PHY IP is part of Synopsys’ high-performance multi-rate transceiver portfolio for high-end networking and ...

1624 0.0

PCIe 6.0 PHY IP for TSMC N4P The multi-channel Synopsys PHY IP for PCI Express (PCIe) 6.0 meets today’s demands for higher bandwidth and power efficiency across network interface ...

1625 75.0

MIPI C-PHY/D-PHY Combo Universal IP (8.0Gsps/trio, 6.5Gbps/lane) in TSMC 16FFC The MXL-CDPHY-UNIV-8p0G-T-16FFC is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificatio...

1626 0.0

SPI Master Controller w/FIFO (AHB & AHB-Lite Bus) The Digital Blocks DB-SPI-M is a Serial Port Interface (SPI) Controller Verilog IP Core supporting only Master SPI Bus transfers (both Full Duplex and...

1627 0.0

USB 2.0 OTG Dual Role Device The Arasan USB 2.0 OTG DRD IP Core is compliant with the OTG Supplement Rev. 1.0a. The USB 2.0 OTG DRD core supports the Host Controller, Device Contr...

1628 5.0

MIPI CSI-2 The MIPI CSI-2 IP core is a highly scalable and silicon-agnostic implementation of the MIPI Camera Serial Interface 2 version 4.1 targeting ASIC and ...

1629 0.0

Synopsys MIPI C-PHY IP on TSMC N7 Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

1630 0.0

MIPI C-PHY v2.0 D-PHY v2.1 RX for TSMC N6 Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

1631 0.0

PCIe5.0/4.0/3.0 PHY & Controller INNOSILICON™ PCIe 5.0 IP combines a high-performance controller and PHY, which is fully compliant with PCIe 5.0/4.0/3.0, and PIPE specifications. The ...

1632 0.0

HDMI2.1/2.0/1.4 PHY & Controller INNOSILICON™ HDMI IP is designed for transmitting and receiving video and audio signals between the video source devices and display. It is fully comp...

1633 0.0

PCIe6.0/CXL3.0 PHY & Controller INNOSILICON™ PCIe 6.0 and CXL 3.0 IP solutions combines a high-performance controller and PHY and is fully compliant with PCIe 6.0, CXL 3.0, and PIPE ...

1634 0.0

64G Multi-SerDes INNOSILICON™ 64G Multi-SerDes PHY IP is a highly configurable PHY capable of supporting speeds up to 64 Gbps within a single lane. The PHY is pre-conf...

1635 0.0

USB2.0/eUSB2.0 PHY & Controller USB is the ubiquitous interconnect standard of choice for a wide range of computing and consumer applications. Innosilicon provides a comprehensive se...

1636 0.0

DP/eDP PHY + Controller INNOSILICON™ DP/eDP IP is designed for transmitting or receiving video and audio signals between the video source devices and display devices. It is f...

1637 0.0

SPI Master Controller w/FIFO (APB Bus) The Digital Blocks DB-SPI-M is a Serial Port Interface (SPI) Controller Verilog IP Core supporting only Master SPI Bus transfers (both Full Duplex and...

1638 0.0

LVDS/TTL PHY & Controller INNOSILICON™ LVDS/TTL IP implements the LVDS TIA/EIA protocol, providing a low-voltage, high-speed point-to-point signal interface. It supports either...

1639 0.0

Synopsys PCIe 5.0 PHY IP for SF5 The multi-channel Synopsys PHY IP for PCI Express® 4.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...

1640 20.0

TSMC 12nm 16Gbps SerDes IP supporting multiple serial protocols A high-performance, low-power 16Gbps SerDes IP supporting multiple serial protocols. Integrated PMA and PCS layers with advanced equalization and diag...

1641 0.0

UCIe 1.1 PHY for Standard Package (8nm) The UCI Express Specification Revision 1.1 supports high-speed serialization and deserialization at 4GT/s, 8GT/s, 12GT/s, and 16GT/s with a 16-lane co...

1642 0.0

UCIe 2.0 PHY for Advanced Package (8nm) The UCI Express Specification Revision 2.0 supports high-speed serialization and deserialization at 4GT/s, 8GT/s, 12GT/s, 16GT/s, 24GT/s and 32GT/s wi...

1643 0.0

MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in Samsung (SF2P) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

1644 0.0

MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes in Samsung (SF2P) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

1645 0.0

224G Ethernet PHY in Samsung (SF4X) The Synopsys 224G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency need...

1646 0.0

eUSB2V2 PHY in TSMC (22nm) Synopsys provides designers with silicon-proven, configurable eUSB2 PHYs that are compliant with the USB-Implementers Forum (USB-IF) eUSB2 and USB 2.0...

1647 0.0

MIPI MPHY Type 1 G6 2TX2RX in TSMC N6 The silicon-proven Synopsys MIPI® M-PHY IP, compliant with the latest MIPI M-PHY v4.1 specification, supports multiple gears and a broad range of high...

1648 0.0

I2C Slave Controller - Low Power, Low Noise Config with APB Interface The Digital Blocks DB-I2C-S-SCL-CLK-APB Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC or other high performance microprocessor via the AMBA...

1649 0.0

PCIe 4.0 SR PHY in TSMC (N3P, N2P) The multi-channel Synopsys PHY IP for PCI Express® 4.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...

1650 0.0

PCIe 7.0 PHY in Samsung (SF4X) The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 7.0 meets today’s demands for higher bandwidth and power efficiency across backplane, and c...