Design & Reuse
Catalog of SIP Cores
System on Chip design resources
694 IP
101
5.5077
MIPI D-PHY TRx 2.15Gbps (28nm)
The MIPI D-PHY IP supports data rates of up to 2.15Gbps. It operates in High-Speed (HS), Low-Power (LP), and Escape modes, where High-Speed mode provi...
102
5.5077
MIPI D-PHY TRx 2.1Gbps (14nm)
The MIPI D-PHY IP supports data rates of up to 2.1Gbps. It operates in High-Speed (HS), Low-Power (LP), and Escape modes, where High-Speed mode provid...
103
5.5077
SLVS-EC 2.0 RX PHY (14nm)
The SLVS-EC Receiver PHY IP consists of a hard macro architecture compliant with SLVS-EC version 2.0 specification, supporting data rate up to 5 Gbps ...
104
5.5077
SLVS-EC 3.0 RX PHY (4nm)
The SLVS-EC Receiver PHY IP consists of a hard macro architecture compliant with SLVS-EC version 3.0 specification, supporting data rate up to 10 Gbps...
105
5.5077
Intra-Panel Multi Strandard Low-Power TX PHY (28nm)
The Intra-Panel TX PHY is a COG and COF transmitter supporting up to 3.2Gbps data rate with low power consumption. It features a DC-coupled differenti...
106
5.5077
Intra-Panel Multi Strandard TX PHY (14nm)
The Intra-Panel TX PHY is a COG and COF transmitter supporting up to 3.6Gbps data rate with low power consumption. It features a DC-coupled differenti...
107
5.5077
Intra-Panel Multi Strandard TX PHY (8nm)
The Intra-Panel TX PHY is a COG and COF transmitter supporting up to 4.0Gbps data rate with low power consumption. It features a DC-coupled differenti...
108
5.5077
DP 1.4 / eDP v1.4b TXPHY (14nm)
The eDP v1.4b TX PHY IP consists of a hard macro architecture supporting embedded DisplayPort v1.4 specification with data rates up to 8.1 Gbps per la...
109
5.5077
DP 1.4 / eDP v1.4b TXPHY (8nm)
The eDP v1.4b TX PHY IP consists of a hard macro architecture supporting embedded DisplayPort v1.4 specification with data rates up to 8.1 Gbps per la...
110
5.5077
DP 2.1a / eDP v2.0 RXPHY (4nm)
The DP/eDP RX PHY consists of hardmacro PHY compliant to DP v2.1a and eDP v2.0 specification, supporting maximum data rate of up to UHBR(20Gbps) opera...
111
5.5077
DP 2.1a / eDP v2.0 TXPHY (4nm)
The DP/eDP TX PHY consists of hardmacro PHY compliant to DP v2.1a and eDP v2.0 specification, supporting maximum data rate of up to UHBR(20Gbps) opera...
112
5.5077
DSC 1.2b Decoder
The DSC 1.2b Decoder is an efficient video decompression IP that complies with the VESA Display Stream Compression (DSC) 1.2b standard. Optimized for ...
113
5.5077
DSC 1.2b Encoder
The DSC 1.2b Encoder is an efficient video compression IP that complies with the VESA Display Stream Compression (DSC) 1.2b standard. Optimized for lo...
114
5.3043
X-Band 50dBm Flangemount GaN Power Amplifier IP
VPM10100 is an X-band (8.5–10.5 GHz) 100 W GaN-on-SiC 250 nm high-power amplifier delivering >50 dBm saturated output power with >30% PAE in a ceramic...
115
5.3043
5G FR1 Sub-6GHz Direct-Conversion RF Receiver IP in 28nm
The 5G-RF1 bands-Receiver is a high-performance, highly integrated direct-conversion (Zero-IF) radio frequency receiver IP tailored for 5G New Radio (...
116
5.3043
5G FR1 Sub-6GHz Direct-Conversion RF Transmitter IP in 28nm
The 5G-RF1 bands-Transmitter is a high-performance, highly integrated direct-conversion (Zero-IF) radio frequency transmitter (TX) IP, specifically en...
117
5.3043
High-Speed RF Local Oscillator (LO) Generator IP Block
High-speed local-oscillator (LO) generator producing quadrature (I/Q) clocks with selectable 50% and 25% duty-cycle modes and a divide-by-2 output div...
118
5.3043
Ku-Band 47dBm GaN Power Amplifier IP
VPA1550 is a Ku-band (13.5–15.5 GHz) 50 W GaN high-power amplifier delivering >46 dBm saturated output power with >25% PAE in a flange package. It ser...
119
5.3043
Ku-Band 49dBm Flangemount GaN Power Amplifier IP
VPM1580 is a Ku-band (13.5–15.5 GHz) 80 W GaN high-power amplifier delivering >49 dBm saturated output power with >20% PAE in a ceramic flange package...
120
5.1304
C-Band 50dBm GaN Power Amplifier IP
VPA06100 is a C-band (5.2–5.7 GHz) 100 W GaN-on-SiC 250 nm power amplifier delivering >50 dBm saturated output power with >45% PAE in a QFN 7×7 packag...
121
5.1304
IEEE 802.16e WiMax Turbo Encoder and Decoder IP Core
This IP suite implements the WiMax (IEEE 802.16e-2009) Convolutional Turbo Code (CTC) in hardware. The Turbo Encoder performs Forward Error Correction...
122
5.1304
3GPP 5G NR and Wi-Fi 7 LDPC Encoder Decoder IP
LDPC Encoder/Decoder core provides a high-performance implementation of the Low-Density Parity-Check (LDPC) with the 3GPP 5G NR (TS 38.212), 3GPP RedC...
123
5.1304
3GPP LTE Turbo Encoder and Decoder IP Core
This IP suite implements the 3GPP LTE (3GPP TS 36.212 1) Convolutional Turbo Code (CTC) in hardware. The Turbo Encoder performs Forward Error Correcti...
124
5.1304
Low-Power MIPS32 Embedded Processor Core with DSPR2 Extensions
MIPS32 is a 32-bit RISC architecture for low-power embedded systems. This baseline implementation targets IoT and DSP workloads using a compact 5-stag...
125
5.0
A radiation-hardened GlobalFoundries 12nm LP/LP+ 0.8V LVDS Transceiver
Certus Semiconductor’s 2.5Gbps LVDS transceiver in GlobalFoundries LP/LP+ is designed for high-speed, low-power data transmission in radiation-intensi...
126
5.0
A radiation-hardened GlobalFoundries 12nm LP/LP+ 0.8V SLVS Transceiver
This SLVS I/O Library delivers a robust, high-performance solution for high-speed differential signaling in GlobalFoundries 12nm process technology. D...
127
5.0
A TSMC 16nm 2Gbps LVDS/SLVS Combo Transceiver
This combo transceiver is a highly configurable 2Gbps transceiver for LVDS or SLVS interfaces. With features like dynamic interface selection, on-die ...
128
5.0
1.8V & 3.3V Radiation Hardened GPIO with Optimized LDO in GlobalFoundries 12 LP/LP+
This radiation-hardened, by design, library features both a 1.8 and 3.3V GPIO with multiple drive strengths of 2mA, 4mA,8mA, and 16mA, along with a fu...
129
5.0
TA22: 200Mbps 0.9V SLVS Transceiver, TSMC 22nm
A 0.9V SLVS differential transceiver in TSMC 22nm, optimized for low-power, high-speed signaling. It supports data rates up to 200Mbps, complies with ...
130
5.0
Radiation-Hardened GPIO, ODIO and LVDS Interface in SkyWater 90nm
This Library, developed on SkyWater 90nm CMOS, delivers a radiation-hardened suite of robust interfaces covering general-purpose, open-drain, and high...
131
5.0
SATA/SAS 3.0 PHY
With sophisticated architecture and advanced technology, KNiulink SATA/SAS transceiver IP with PMA and PCS layer is designed for low power and high pe...
132
5.0
DC/DC buck converter
DCDC-ULP-22FDX-1.62-5.5-0.5-3.3.01x_GF_22_FDX is a DC/DC buck converter in GF 22FDX with low-quiescent current and high efficiency at light load....
133
5.0
AD16: 1.8V/3.3V Flip-chip I/O Library with I2C ODIO & 5V HPD, TSMC 16nm
A production-quality, silicon-proven flip-chip I/O library in TSMC 16nm with multi-voltage GPIO (1.8V or 3.3V, dynamically selectable) and 4kV HBM ESD...
134
5.0
DDR3/4 and LPDDR2/3/4/4x Combo PHY&MAC
With sophisticated architecture and advanced technology, this DDR3/4 and LPDDR2/3/4/4x IP combo solution with high performance and low power. In 12~28...
135
5.0
AF12: 1.8V/3.3V Flip-chip I/O library with I2C ODIO & 5V Hot-Plug Detect, TSMC 12nm
A production-quality, silicon-proven flip-chip I/O library in TSMC 12nm with multi-voltage GPIO (1.8V or 3.3V, dynamically selectable) and 4kV HBM ESD...
136
5.0
UF16 D2D: <4Gbps low-power die-to-die interface, TSMC 16nm
A silicon-proven, low-power die-to-die interface in TSMC 16nm (FFC/FFC+) for flip-chip / multi-die assembly. Separate TX-only and RX-only cells run in...
137
5.0
UF16: Switchable 1.8V/3.3V GPIO Library with 5V ODIO, OTP & analog, TSMC 16nm
A flip-chip I/O library in TSMC 16nm (FFC/FFC+) that detects and dynamically adapts to a 1.8V or 3.3V VDDIO supply during operation. The GPIO configur...
138
5.0
EG22: 1.8V/3.3V GPIO Library with 5V ODIO, HDMI, LVDS & analog cells, TSMC 22nm
A silicon-proven, inline flip-chip-compatible I/O library in TSMC 22nm with a two-speed GPIO (75MHz and 150MHz), 5V open-drain I/O, and dedicated HDMI...
139
5.0
VG22: 1.8V/3.3V multi-voltage GPIO library with 5V ODIO & analog, TSMC 22nm
A silicon-proven inline wirebond I/O library in TSMC 22nm with dynamic 1.8V/3.3V multi-voltage GPIO (25/75/150MHz), 5V fail-safe open-drain I/O, and a...
140
5.0
OG22: Three-speed 1.8V/3.3V GPIO Library with I2C ODIO, TSMC 22nm
A silicon-proven, inline flip-chip-compatible I/O library in TSMC 22nm with three speed-graded GPIOs (25/75/150MHz) and an I2C-compliant open-drain I/...
141
5.0
MH12: Hardened 1.8V/3.3V GPIO & power library with integrated POC, TSMC 12nm
A production-ready flip-chip I/O library in TSMC 12nm (FFC/FFC+) built around hardened 1.8V/3.3V GPIOs with programmable drive strength, input hystere...
142
5.0
PM22: Ultra-low leakage 1.8V GPIO with I2C ODIO & Analog, TSMC 22nm ULL
An ultra-low-leakage I/O library in TSMC 22nm ULL: the GPIO leaks just ~150pA from VDDIO and ~1nA typical from VDD. It pairs a configurable input/outp...
143
5.0
MM22: Ultra-low leakage dynamic 1.8/3.3V GPIO Library with I2C ODIO & analog, up to xSPI400, TSMC 22nm ULL
An ultra-low-leakage I/O library in TSMC 22nm ULL with a dynamic 1.8–3.3V GPIO that auto-adapts across the supply range with no manual mode switching....
144
5.0
SN12: 5V Generic I/O & ESD protection Library (>8kV HBM / 8A), TSMC 12nm
A base set of ESD protection structures for I/O and power supplies in TSMC 12nm FFC/FFC+, targeting up to 8A (>8kV HBM). The cells trigger and protect...
145
5.0
Power On Reset / Brown Out Reset
POR-BOR-1.62-3.63-0.55-3.3.02_TSMC_22_ULL is a combined Power-On-Reset and Brown-Out-Reset in TSMC 22ULL....
146
5.0
Power On Reset / Brown Out Reset
POR-BOR-1.62-1.62-3.63-0.55-3.3.02_TSMC_40_uLP is a combined Power-On-Reset and Brown-Out-Reset in TSMC 40uLP....
147
5.0
Power On Reset / Brown Out Reset
POR-BOR-1.44-1.98-0.6-1.8.02_GF_22_FDX is a Power-On-Reset and Brown-Out-Reset in GF 22FDX with programmable detection thesholds....
148
5.0
Power On Reset / Brown Out Reset
POR-BOR-LS-1.62-3.63-0.55-3.3.02_TSMC_40_uLP is a combined Power On Reset and Brown Out Reset in TSMC 40uLP....
149
5.0
VR13: Radiation-hardened wirebond I/O library with 3.3V GPIO, LVDS, I2C ODIO, analog & OTP, TSMC 130nm
A silicon-proven, radiation-hardened wirebond I/O library in TSMC 130nm, rated for an extended −50°C to 200°C range with sleep-retention and a built-i...
150
5.0
RS16: Controlled-impedance multi-protocol I/O Library (HP, HV & RCAL macros), TSMC 16nm
A high-performance, flip-chip I/O library in TSMC 16FFC/FFC+ for high-speed digital and mixed-signal designs, offering single-ended and differential I...