Design & Reuse
6105 IP
101
1.0
Universal Asynchronous Receiver Transmitter
The macro M16450, implements a synchronous universal asynchronous receiver/transmitter, which provides an interface between a microprocessor and a ser...
102
1.0
Power regulator - SMIC 180nm Logic
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103
1.0
SPI Master - EEPROM Controller
The MSPIM IP implements a synchronous a single-chip SPI Master IP capable of high speed serial data transfer with up to 8 SPI slave. The MSPIM IP can...
104
1.0
USB1.1 PHY - SMIC 180nm Logic
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105
1.0
USB1.1 PHY - SMIC 180nm Logic
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106
1.0
USB2.0 PHY - SMIC 153nm Logic
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107
1.0
USB2.0 PHY - SMIC 180nm Logic
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108
1.0
Dual SATA Host controller on Virtex 5 FXT FPGA
The LDS SATA HOST DUAL XF5 IP incorporates the Transport layer, the Link layer and the PHY layer on a Xilinx Virtex 5 FPGA. The LDS SATA HOST DUAL XF5...
109
1.0
Synchronous Universal Asynchronous Receiver/Transmitter
The macro MUART, implements a synchronous universal asynchronous receiver/transmitter, which provides an interface between a microprocessor and a seri...
110
0.118
A 10bit 1ksps temperature to digital converter ; UMC 28nm HPC/RVT Logic and Mixed-mode Process
A 10bit 1ksps temperature to digital converter ; UMC 28nm HPC/RVT Logic and Mixed-mode Process...
111
0.118
2 Input Power Switch; UMC 55nm LP/RVT LowK Logic Process
2 Input Power Switch; UMC 55nm LP/RVT LowK Logic Process...
112
0.118
8 Lanes LVDS RX IO PAD, UMC 40nm LP/RVT LowK Logic Process
8 Lanes LVDS RX IO PAD, UMC 40nm LP/RVT LowK Logic Process...
113
0.118
2 port Linear regulator for FXSATA168HD0A ; UMC 90nm SP/RVT LowK Logic Process
2 port Linear regulator for FXSATA168HD0A ; UMC 90nm SP/RVT LowK Logic Process...
114
0.118
4-level detector for USB-OTG applications, input 3.3V; UMC 0.11um eFlash Logic process_x005F_x005F_x005F_x000D_
4-level detector for USB-OTG applications, input 3.3V; UMC 0.11um eFlash Logic process...
115
0.118
4-Level Voltage Detector for USB-OTG ; UMC 55nm 2.5V overdrive 3.3V device LP/HVT LowK Logic Process _x005F_x005F_x005F_x000D_
4-Level Voltage Detector for USB-OTG ; UMC 55nm 2.5V overdrive 3.3V device LP/HVT LowK Logic Process...
116
0.118
2-sets voltage detector ; UMC 55nm Logic SP/RVT Low-K Process
2-sets voltage detector ; UMC 55nm Logic SP/RVT Low-K Process...
117
0.118
2-sets voltage detector ;UMC 0.11nm Logic Mixed Mode AE Process
2-sets voltage detector ;UMC 0.11nm Logic Mixed Mode AE Process...
118
0.118
2-sets voltage detector; UMC 55 nm Logic LP/RVT Low-K Process
2-sets voltage detector; UMC 55 nm Logic LP/RVT Low-K Process...
119
0.118
0.11um LVDS TX I/O PAD ; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process
0.11um LVDS TX I/O PAD ; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process...
120
0.118
1.2V 50-200MHz DLL with programmable phase delay; UMC 0.11um HS/AE (AL Enhancement) Logic Process
1.2V 50-200MHz DLL with programmable phase delay; UMC 0.11um HS/AE (AL Enhancement) Logic Process...
121
0.118
1.2V 50-202.5MHz DLL with programable phase delay; UMC 0.11um HS/AE (AL Enhancement) Logic Process
1.2V 50-202.5MHz DLL with programable phase delay; UMC 0.11um HS/AE (AL Enhancement) Logic Process...
122
0.118
3.3V input , Programmable Output 1.8V/1.2V with 300mA driving capability; Linear Regulator; UMC 55nm SP/RVT LowK Logic Process
3.3V input , Programmable Output 1.8V/1.2V with 300mA driving capability; Linear Regulator; UMC 55nm SP/RVT LowK Logic Process...
123
0.118
3.3v LVDS RX IO 1.25Gbps, UMC 40nm LP/RVT LowK Logic Process
3.3v LVDS RX IO 1.25Gbps, UMC 40nm LP/RVT LowK Logic Process...
124
0.118
3.3v LVDS RX, 3 data lane and 1 clock lane using UMC 40nm LP/RVT LowK Logic Process
3.3v LVDS RX, 3 data lane and 1 clock lane using UMC 40nm LP/RVT LowK Logic Process...
125
0.118
3.3v LVDS RX,UMC 40nm LP/RVT LowK Logic Process
3.3v LVDS RX,UMC 40nm LP/RVT LowK Logic Process...
126
0.118
3.3V LVDS Transmitter 16~100MHz; 55nm SP/RVT LowK Logic Process
3.3V LVDS Transmitter 16~100MHz; 55nm SP/RVT LowK Logic Process...
127
0.118
3.3V LVDS Transmitter 700Mbps; UMC 40nm LP LowK Logic Process
3.3V LVDS Transmitter 700Mbps; UMC 40nm LP LowK Logic Process...
128
0.118
3.3V Power On Reset, Vrr=1.90 without Vfr, UMC 40nm LP/RVT LowK Logic Process
3.3V Power On Reset, Vrr=1.90 without Vfr, UMC 40nm LP/RVT LowK Logic Process...
129
0.118
3.3V RTC Power On Reset; UMC 55nm uLP Logic Process
3.3V RTC Power On Reset; UMC 55nm uLP Logic Process...
130
0.118
3.3V RTC Power On Reset; UMC 55nm uLP/SST Logic Process
3.3V RTC Power On Reset; UMC 55nm uLP/SST Logic Process...
131
0.118
3.3V to 0.3V and VCCK-0.3V / 10mA voltage source for N/P well forward body bias, Linear Regulator, UMC 55nm uLP/RVT Low-K Logic Process
3.3V to 0.3V and VCCK-0.3V / 10mA voltage source for N/P well forward body bias, Linear Regulator, UMC 55nm uLP/RVT Low-K Logic Process...
132
0.118
3.3V to 0.75*VCC33A with 5mA driving capability with external capacitor; Linear Regulator; UMC 55nm LP/RVT LowK Logic Process
3.3V to 0.75*VCC33A with 5mA driving capability with external capacitor; Linear Regulator; UMC 55nm LP/RVT LowK Logic Process...
133
0.118
3.3V to 0.9V with 2mA driving capability,Linear Regulator; UMC 28nm HPC Logic and Mixed-Mode process
3.3V to 0.9V with 2mA driving capability,Linear Regulator; UMC 28nm HPC Logic and Mixed-Mode process...
134
0.118
3.3V to 0.9V/150mA REG, Linear Regulator, UMC 28nm HPC Logic and Mixed-Mode Process
3.3V to 0.9V/150mA REG, Linear Regulator, UMC 28nm HPC Logic and Mixed-Mode Process...
135
0.118
3.3v to 1.0v/100mA REG, Linear Regulator, UMC 55nm SP/RVT LowK Logic Process
3.3v to 1.0v/100mA REG, Linear Regulator, UMC 55nm SP/RVT LowK Logic Process...
136
0.118
3.3V to 1.1V / 600mA PWM, Switching Regulator using MIFS C40LP Logic Process
3.3V to 1.1V / 600mA PWM, Switching Regulator using MIFS C40LP Logic Process...
137
0.118
3.3V to 1.1V / 600mA PWM, Switching Regulator, UMC 40nm LP/RVT LowK Logic Process
3.3V to 1.1V / 600mA PWM, Switching Regulator, UMC 40nm LP/RVT LowK Logic Process...
138
0.118
3.3V to 1.1V /50mA REG; Linear Regulator; UMC 40nm LP/RVT LowK Logic Process_x005F_x005F_x005F_x000D_
3.3V to 1.1V /50mA REG; Linear Regulator; UMC 40nm LP/RVT LowK Logic Process...
139
0.118
3.3V to 1.1V with 30mA driving capability; Linear Regulator; UMC 40nm LP/RVT LowK Logic Process
3.3V to 1.1V with 30mA driving capability; Linear Regulator; UMC 40nm LP/RVT LowK Logic Process...
140
0.118
3.3v to 1.1v/200mA REG, Linear Regulator, UMC 40nm LP/RVT LowK Logic Process
3.3v to 1.1v/200mA REG, Linear Regulator, UMC 40nm LP/RVT LowK Logic Process...
141
0.118
3.3v to 1.1v/300mA REG, Linear Regulator, UMC 40nm LP/RVT LowK Logic Process
3.3v to 1.1v/300mA REG, Linear Regulator, UMC 40nm LP/RVT LowK Logic Process...
142
0.118
3.3V to 1.2V with 150mA driving capability without external capacitor(Cap-less); use trimming ports (need e-Fuse IP); Linear Regulator; UMC 55nm eFlash LowK Logic Process
3.3V to 1.2V with 150mA driving capability without external capacitor(Cap-less); use trimming ports (need e-Fuse IP); Linear Regulator; UMC 55nm eFlas...
143
0.118
3.3V to 1.2V with 150mA driving capability, Istb=200uA; Linear Regulator; UMC 65nm LP/RVT LowK Logic Process
3.3V to 1.2V with 150mA driving capability, Istb=200uA; Linear Regulator; UMC 65nm LP/RVT LowK Logic Process...
144
0.118
3.3V to 1.2V with 150mA driving capability; Linear Regulator; UMC 0.13um LOGIC PROCESS
3.3V to 1.2V with 150mA driving capability; Linear Regulator; UMC 0.13um LOGIC PROCESS...
145
0.118
3.3V to 1.2V with 180mA driving capability; Linear Regulator; UMC 55nm eFlash LowK Logic process
3.3V to 1.2V with 180mA driving capability; Linear Regulator; UMC 55nm eFlash LowK Logic process...
146
0.118
3.3V to 1.2V with 220mA driving capability; Linear Regulator; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process
3.3V to 1.2V with 220mA driving capability; Linear Regulator; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process...
147
0.118
3.3V to 1.2V with 350mA driving capability; Linear Regulator; UMC 0.11£gm HS/FSG logic process_x005F_x005F_x005F_x000D_
3.3V to 1.2V with 350mA driving capability; Linear Regulator; UMC 0.11£gm HS/FSG logic process...
148
0.118
3.3V to 1.2V/0.9V with 100mA driving capability;Linear Regulator, UMC 55nm uLP/HVT Low-K Logic Process
3.3V to 1.2V/0.9V with 100mA driving capability;Linear Regulator, UMC 55nm uLP/HVT Low-K Logic Process...
149
0.118
3.3V to 1.2V/0.9V with 100mA driving capability;Linear Regulator, UMC 55nm uLP/RVT Low-K Logic Process
3.3V to 1.2V/0.9V with 100mA driving capability;Linear Regulator, UMC 55nm uLP/RVT Low-K Logic Process...
150
0.118
3.3v to 1.2v/150mA REG, Linear Regulator, UMC 55nm LP/RVT LowK Logic process
3.3v to 1.2v/150mA REG, Linear Regulator, UMC 55nm LP/RVT LowK Logic process...