Atria Logic, Inc. IP Cores

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451

0.118

UMC 28nm Logic process standard synchronous RVT periphery high density single port SRAM memory compiler with row redundancy.

UMC 28nm Logic process standard synchronous RVT periphery high density single port SRAM memory compiler with row redundancy....

452

0.118

UMC 28nm Logic process standard synchronous RVT periphery high density single port SRAM memory compiler.

UMC 28nm Logic process standard synchronous RVT periphery high density single port SRAM memory compiler....

453

0.118

UMC 40nm Logic process standard Synchronous High Density Two Port Register File SRAM memory compiler.

UMC 40nm Logic process standard Synchronous High Density Two Port Register File SRAM memory compiler....

454

0.118

UMC 40nm LP Logic Process Dual-Port SRAM Memory Compiler with LVT peripheral

UMC 40nm LP Logic Process Dual-Port SRAM Memory Compiler with LVT peripheral...

455

0.118

UMC 40nm LP Logic Process Dual-Port SRAM memory compiler with redundancy

UMC 40nm LP Logic Process Dual-Port SRAM memory compiler with redundancy...

456

0.118

UMC 40nm LP Logic Process Dual-Port SRAM memory compiler with redundancy and LVT peripheral

UMC 40nm LP Logic Process Dual-Port SRAM memory compiler with redundancy and LVT peripheral...

457

0.118

UMC 40nm LP Logic Process one-port register file for area optimize with HVT peripheral

UMC 40nm LP Logic Process one-port register file for area optimize with HVT peripheral...

458

0.118

UMC 40nm LP Logic Process one-port register file for area optimize with LVT peripheral

UMC 40nm LP Logic Process one-port register file for area optimize with LVT peripheral...

459

0.118

UMC 40nm LP Logic Process Single Port SRAM memory compiler using 213 bit -cell with peri-HVT

UMC 40nm LP Logic Process Single Port SRAM memory compiler using 213 bit -cell with peri-HVT...

460

0.118

UMC 40nm LP Logic Process Single Port SRAM Memory Compiler using 213 bit-cell with Peri-LVT

UMC 40nm LP Logic Process Single Port SRAM Memory Compiler using 213 bit-cell with Peri-LVT...

461

0.118

UMC 40nm LP Logic Process standard synchronous high density dual port SRAM memory compiler with LVT

UMC 40nm LP Logic Process standard synchronous high density dual port SRAM memory compiler with LVT...

462

0.118

UMC 40nm LP Logic Process standard synchronous high density dual port SRAM memory compiler with ROW redundancy with LVt peripheral

UMC 40nm LP Logic Process standard synchronous high density dual port SRAM memory compiler with ROW redundancy with LVt peripheral...

463

0.118

UMC 40nm LP Logic Process TCAM with LVT peripheral memory compiler

UMC 40nm LP Logic Process TCAM with LVT peripheral memory compiler...

464

0.118

UMC 40nm LP Logic Process Two-Port Register File with LVT Peripheral Memory Compiler

UMC 40nm LP Logic Process Two-Port Register File with LVT Peripheral Memory Compiler...

465

0.118

UMC 40nm LP Logic Process ULL Single Port SRAM Memory Compiler using 213 bit-cell with peri-HVT

UMC 40nm LP Logic Process ULL Single Port SRAM Memory Compiler using 213 bit-cell with peri-HVT...

466

0.118

UMC 40nm LP Logic Process ULL Single Port SRAM Memory Compiler using 213 bit-cell with peri-LVT

UMC 40nm LP Logic Process ULL Single Port SRAM Memory Compiler using 213 bit-cell with peri-LVT...

467

0.118

UMC 40nm LP Logic Process Ultra High Speed One-Port Register File_x005F_x005F_x005F_x005F_x005F_x000D_

UMC 40nm LP Logic Process Ultra High Speed One-Port Register File...

468

0.118

UMC 40nm LP LowK Logic Process ULL Dual-Port SRAM Memory Compiler with Peri-LVT

UMC 40nm LP LowK Logic Process ULL Dual-Port SRAM Memory Compiler with Peri-LVT...

469

0.118

UMC 40nm LP/HVT Logic Process SYNS-like 9T ECO_M1 Cell Library

UMC 40nm LP/HVT Logic Process SYNS-like 9T ECO_M1 Cell Library...

470

0.118

UMC 40nm LP/HVT Logic Process SYNS-like 9T GENERIC CORE Cell Library

UMC 40nm LP/HVT Logic Process SYNS-like 9T GENERIC CORE Cell Library...

471

0.118

UMC 40nm LP/HVT Logic Process SYNS-like 9T POWERSLASH Cell Library

UMC 40nm LP/HVT Logic Process SYNS-like 9T POWERSLASH Cell Library...

472

0.118

UMC 40nm LP/LVT Logic Process SYNS-like 9T ECO_M1 Cell Library

UMC 40nm LP/LVT Logic Process SYNS-like 9T ECO_M1 Cell Library...

473

0.118

UMC 40nm LP/LVT Logic Process SYNS-like 9T GENERIC CORE Cell Library

UMC 40nm LP/LVT Logic Process SYNS-like 9T GENERIC CORE Cell Library...

474

0.118

UMC 40nm LP/LVT Logic Process SYNS-like 9T POWERSLASH Cell Library

UMC 40nm LP/LVT Logic Process SYNS-like 9T POWERSLASH Cell Library...

475

0.118

UMC 40nm LP/RVT Logic Process 1.8V ONFI 3.2 BOAC I/O cell library

UMC 40nm LP/RVT Logic Process 1.8V ONFI 3.2 BOAC I/O cell library...

476

0.118

UMC 40nm LP/RVT Logic Process 1.8V/2.5V/3.3V multi-voltage generic POC BOAC I/O cell library

UMC 40nm LP/RVT Logic Process 1.8V/2.5V/3.3V multi-voltage generic POC BOAC I/O cell library...

477

0.118

UMC 40nm LP/RVT Logic Process 1.8V/3.0V multi-voltage BOAC eMMC I/O cell library

UMC 40nm LP/RVT Logic Process 1.8V/3.0V multi-voltage BOAC eMMC I/O cell library...

478

0.118

UMC 40nm LP/RVT Logic Process SYNS-like 9T ECO_M1 Cell Library

UMC 40nm LP/RVT Logic Process SYNS-like 9T ECO_M1 Cell Library...

479

0.118

UMC 40nm LP/RVT Logic Process SYNS-like 9T GENERIC CORE Cell Library

UMC 40nm LP/RVT Logic Process SYNS-like 9T GENERIC CORE Cell Library...

480

0.118

UMC 40nm LP/RVT Logic Process SYNS-like 9T POWERSLASH Cell Library

UMC 40nm LP/RVT Logic Process SYNS-like 9T POWERSLASH Cell Library...

481

0.118

UMC 40nm uLP Logic Process 1-Port Register File with Peri-HVT

UMC 40nm uLP Logic Process 1-Port Register File with Peri-HVT...

482

0.118

UMC 40nm uLP/HVT Logic Process SYNS-like 7T GENERIC CORE Cell Library

UMC 40nm uLP/HVT Logic Process SYNS-like 7T GENERIC CORE Cell Library...

483

0.118

UMC 40nm uLP/HVT Logic Process SYNS-like 9T GENERIC CORE Cell Library

UMC 40nm uLP/HVT Logic Process SYNS-like 9T GENERIC CORE Cell Library...

484

0.118

UMC 40nm uLP/LVT Logic Process SYNS-like 7T GENERIC CORE Cell Library

UMC 40nm uLP/LVT Logic Process SYNS-like 7T GENERIC CORE Cell Library...

485

0.118

UMC 40nm uLP/LVT Logic Process SYNS-like 9T GENERIC CORE Cell Library

UMC 40nm uLP/LVT Logic Process SYNS-like 9T GENERIC CORE Cell Library...

486

0.118

UMC 40nm uLP/RVT Logic Process SYNS-like 7T GENERIC CORE Cell Library

UMC 40nm uLP/RVT Logic Process SYNS-like 7T GENERIC CORE Cell Library...

487

0.118

UMC 40nm uLP/RVT Logic Process SYNS-like 9T GENERIC CORE Cell Library

UMC 40nm uLP/RVT Logic Process SYNS-like 9T GENERIC CORE Cell Library...

488

0.118

UMC 55nm e-flash Logic Process , 3.3V Analog ESD IO cell Library

UMC 55nm e-flash Logic Process , 3.3V Analog ESD IO cell Library...

489

0.118

UMC 55nm e-flash Logic Process OSC High IO Library

UMC 55nm e-flash Logic Process OSC High IO Library...

490

0.118

UMC 55nm e-flash Logic Process OSC High IO Library

UMC 55nm e-flash Logic Process OSC High IO Library...

491

0.118

UMC 55nm eFlash/HVT Logic Process 7-track ECO_M1 cell library

UMC 55nm eFlash/HVT Logic Process 7-track ECO_M1 cell library...

492

0.118

UMC 55nm eFlash/HVT Logic Process 7-track Genernic Core cell library

UMC 55nm eFlash/HVT Logic Process 7-track Genernic Core cell library...

493

0.118

UMC 55nm eFlash/HVT Logic Process 7-track PowerSlash Kit cell library

UMC 55nm eFlash/HVT Logic Process 7-track PowerSlash Kit cell library...

494

0.118

UMC 55nm eFlash/HVT Logic Process High Speed 12-track ECO_M1 cell library

UMC 55nm eFlash/HVT Logic Process High Speed 12-track ECO_M1 cell library...

495

0.118

UMC 55nm eFlash/HVT Logic Process High Speed 12-track Genernic Core cell library

UMC 55nm eFlash/HVT Logic Process High Speed 12-track Genernic Core cell library...

496

0.118

UMC 55nm eFlash/HVT Logic Process High Speed 12-track PowerSlash Kit cell library

UMC 55nm eFlash/HVT Logic Process High Speed 12-track PowerSlash Kit cell library...

497

0.118

UMC 55nm eFlash/HVT LowK Logic Process 8-track POWERSLASH Core Library

UMC 55nm eFlash/HVT LowK Logic Process 8-track POWERSLASH Core Library...

498

0.118

UMC 55nm eFlash/HVT LowK Logic Process 8-track Standard Core Library

UMC 55nm eFlash/HVT LowK Logic Process 8-track Standard Core Library...

499

0.118

UMC 55nm eFlash/HVT LowK Logic Process 8-track Standard Core Library

UMC 55nm eFlash/HVT LowK Logic Process 8-track Standard Core Library...

500

0.118

UMC 55nm eFlash/LVT Logic Process 7-track ECO_M1 Generic cell library

UMC 55nm eFlash/LVT Logic Process 7-track ECO_M1 Generic cell library...

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