Design & Reuse
3912 IP
3601
0.118
Fujitsu 90nm LL-UHS process MPCA M345 core cell library
Fujitsu 90nm LL-UHS process MPCA M345 core cell library...
3602
0.118
Multi-Voltage IO IP, 1.8V/2.5V/3.3V Operations, UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG Logic process Multi-Voltage metal programmable IO Cell Library....
3603
0.118
Multi-Voltage IO IP, BOAC (Bonding Over Active Circuit), UMC 0.15um SP process
UMC 0.15um SP process standard Multi-Voltage IO....
3604
0.118
Multi-Voltage IO IP, BOAC (Bonding Over Active Circuit), UMC 0.18um LL process
UMC 0.18um LL Logic process standard Multi-Voltage IO....
3605
0.118
Output frequency 32KHz. Input 0.9V-1.1V; UMC 55nm SP/RVT LowK Logic Process
Output frequency 32KHz. Input 0.9V-1.1V; UMC 55nm SP/RVT LowK Logic Process...
3606
0.118
5V 1W Mono Speaker Amplifier, UMC 55nm SP/RVT LowK Logic Process.
5V 1W Mono Speaker Amplifier, UMC 55nm SP/RVT LowK Logic Process....
3607
0.118
5V to 3.3V/1.8V with 80mA/40mA driving capability, Linear Regulator; UMC 0.162um GII process._x005F_x005F_x005F_x000D_
5V to 3.3V/1.8V with 80mA/40mA driving capability, Linear Regulator; UMC 0.162um GII process....
3608
0.118
5V to 4.2V battery charger with 3.3V device ; UMC 0.153um Logic/Mixed-Mode Process
5V to 4.2V battery charger with 3.3V device ; UMC 0.153um Logic/Mixed-Mode Process...
3609
0.118
5V with 250mA driving capability, Istb=120uA Linear Regulator; 0.35um Logic process
5V with 250mA driving capability, Istb=120uA Linear Regulator; 0.35um Logic process...
3610
0.118
8V ~ 25V HV driver, UMC 0.35um 3.3V/5V/40V CDMOS logic process
8V ~ 25V HV driver, UMC 0.35um 3.3V/5V/40V CDMOS logic process...
3611
0.118
LVDS Receiver IP, 8MHz - 135MHz, UMC 0.13um SP/FSG process
2.5V LVDS Receiver 8~135MHz, UMC 90nm SP process....
3612
0.118
LVDS Receiver IP, 20MHz - 135MHz , UMC 0.18um G2 process
DLL-based LVDS RX, VCC=3.3 for 20M~135MHz and VCC=2.5 for 20M~100MHz operation frequency, UMC 0.13um HS FSG Logic process....
3613
0.118
LVDS Receiver IP, 20MHz - 135MHz , UMC 0.18um HS/FSG process
20M~135MHz DLL-based LVDS RX, UMC 0.13um HS/FSG process....
3614
0.118
LVDS Receiver IP, 500Mbps, UMC 55nm LP process
LVDS RX IO PAD 500Mbps, UMC 55nm LP/RVT Low-K Logic process....
3615
0.118
LVDS Receiver IP, 700Mbps, UMC 0.13um SP/FSG process
Low Power LVDS Receiver 700Mbps, UMC 90nm SP/RVT Low-K Logic process....
3616
0.118
LVDS Receiver IP, Clock: 16 MHz - 120 MHz, 6:42 data lane expansion for throughput up to 5040 Mbps, UMC 40nm LP process
LVDS RX, UMC 40nm LP/RVT Low-K Logic process....
3617
0.118
LVDS Receiver IP, UMC 90nm SP process
DLL-based LVDS RX, UMC 55nm SP/RVT Low-K Logic process....
3618
0.118
LVDS Rx IO IP, 500Mbps, UMC 90nm LL process
Low Power LVDS Receiver IO 500Mbps, UMC 55nm SP/RVT Low-K Logic process....
3619
0.118
LVDS Rx IO IP, UMC 0.18um G2 process
0.13um LVDS RX IO PAD, UMC 0.13um HS/HVT-FSG process....
3620
0.118
LVDS Rx IO IP, UMC 0.18um Logic process
LVDS RX IO, UMC 90nm SP/RVT Low-K Logic process....
3621
0.118
LVDS Rx IO IP, UMC 90nm SP process
0.18UM RX (PAD), UMC 0.18um GII Logic process....
3622
0.118
LVDS RX IO PAD 300 Mbps with combo GPIO , UMC 55nm eflash/RVT LowK Logic Process
LVDS RX IO PAD 300 Mbps with combo GPIO , UMC 55nm eflash/RVT LowK Logic Process...
3623
0.118
LVDS RX IO PAD 500 Mbps ,UMC 40nm LP/RVT LowK Logic Process
LVDS RX IO PAD 500 Mbps ,UMC 40nm LP/RVT LowK Logic Process...
3624
0.118
LVDS RX IO PAD 500 Mbps, UMC 40nm LP/RVT LowK Logic Process, Bump pad.
LVDS RX IO PAD 500 Mbps, UMC 40nm LP/RVT LowK Logic Process, Bump pad....
3625
0.118
LVDS RX IO PAD 500 Mbps, UMC 40nm LP/RVT LowK Logic Process, for flip chip
LVDS RX IO PAD 500 Mbps, UMC 40nm LP/RVT LowK Logic Process, for flip chip...
3626
0.118
LVDS Transmitter 700Mbps; UMC 28nm HPC Process
LVDS Transmitter 700Mbps; UMC 28nm HPC Process...
3627
0.118
LVDS Transmitter IP, 8MHz - 100MHz, 4 channels, UMC 0.18um G2 process
3.3V 4 channel LVDS Transmitter 8~100MHz, UMC 90nm SP/RVT Low-K process....
3628
0.118
LVDS Transmitter IP, 8MHz - 135MHz, 4 channels, UMC 0.13um SP/FSG process
2.5V 4 channel LVDS Transmitter 8~135MHz, UMC 90nm SP/RVT Low-K process....
3629
0.118
LVDS Transmitter IP, 1200Mbps, UMC 55nm SP process
1.8V Sub-LVDS Transmitter 1200Mbps, UMC 40nm LP/RVT Logic process....
3630
0.118
LVDS Transmitter IP, 16MHz - 178MHz, UMC 55nm SP process
2.5V LVDS Transmitter 16~178MHz, UMC 55nm SP/RVT Low-K Logic process....
3631
0.118
LVDS Transmitter IP, 700Mbps, UMC 0.13um SP/FSG process
3.3V LVDS Transmitter 700Mbps, UMC 90nm SP/RVT low-L process....
3632
0.118
LVDS Transmitter IP, 700Mbps, UMC 55nm SP process
2.5V LVDS Transmitter 700Mbps, UMC 40nm LP Low-K Logic process....
3633
0.118
LVDS Transmitter IP, 700Mbps, UMC 90nm SP process
2.5V LVDS Transmitter 700Mbps, UMC 55nm SP Low-K Logic process....
3634
0.118
LVDS Transmitter IP, 700Mbps, UMC 90nm SP process
3.3V LVDS Transmitter 700Mbps, UMC 55nm SP/RVT Low-K process....
3635
0.118
LVDS Transmitter IP, 85MHz, UMC 55nm SP process
1.8V/3.3V 85MHz 35:5 LVDS Transmitter, UMC 0.18um GII Logic process....
3636
0.118
LVDS Transmitter IP, 8MHz - 135MHz , UMC 0.13um HS/FSG process
8M~135MHz DLL-based LVDS TX, UMC 0.13um HS/FSG process....
3637
0.118
LVDS Transmitter IP, 8MHz - 135MHz, UMC 90nm SP process
2.5V LVDS Transmitter 8~135MHz, UMC 90nm SP process....
3638
0.118
LVDS Transmitter IP, Tx IO, UMC 55nm SP process
0.18um TX PAD, UMC 0.18um Logic RVT-FSG process....
3639
0.118
LVDS Tx IO IP, 1.25GHz, UMC 90nm SP process
Single Port LVDS Transmitter PAD 1.25Gbps, UMC 90nm SP/RVT Low-K process....
3640
0.118
LVDS Tx IO IP, UMC 0.35um Logic process
0.13um LVDS TX IO PAD, UMC 0.13um HS/HVT-FSG process....
3641
0.118
LVDS Tx IO IP, UMC 90nm SP process
LVDS TX Pad, UMC 0.35um Logic process....
3642
0.118
Two Port OTG USB2.0 PHY;BOAC version; Wire bonding;UMC 40 nm LP/RVT process.
Two Port OTG USB2.0 PHY;BOAC version; Wire bonding;UMC 40 nm LP/RVT process....
3643
0.118
Two Port Register File Compiler IP, UMC 0.11um eFlash/HS process
UMC 0.11um eFlash HS process, Two Port Register File....
3644
0.118
Two Port Register File Compiler IP, UMC 0.11um HS/AE process
UMC 0.11um HS/AE (AL Advanced Enhancement) Logic process synchronous Two Port Register File memory compiler....
3645
0.118
Two Port Register File Compiler IP, UMC 0.11um HS/FSG process
UMC 0.11um HS Logic process synchronous Two Port Register File SRAM memory compiler....
3646
0.118
Two Port Register File Compiler IP, UMC 0.11um HS/FSG process
UMC 0.11um HS/FSG Logic process Synchronous Two Port Register File with 339cell memory compiler....
3647
0.118
Two Port Register File Compiler IP, UMC 0.11um LL process
UMC 0.11um AE/LL eFlash process Two Port Register File....
3648
0.118
Two Port Register File Compiler IP, UMC 0.11um LL/AE process
UMC 0.11um LL/AE (AL Advanced Enhancement) Logic process synchronous high density Two Port Register File SRAM memory compiler....
3649
0.118
Two Port Register File Compiler IP, UMC 0.11um LL/FSG process
UMC 0.11um Logic(LL) FSG process synchronous Two Port Register File memory compiler....
3650
0.118
Two Port Register File Compiler IP, UMC 0.11um SP/AE process
UMC 0.11um SP/AE (AL Advance Enhancement) Logic process synchronous Two Port SRAM memory compiler....