Design & Reuse
8727 IP
1751
0.118
PLL (Frequency Synthesizer) IP, Input: 66.66MHz, Output: 400MHz - 800MHz, UMC 0.13um HS/FSG process
Input 66.66MHz, output 400M-800MHz, frequency synthesizable PLL, UMC 0.13um HS/FSG Logic process....
1752
0.118
PLL (Frequency Synthesizer) IP, Input: 66MHz - 100MHz, Output: 400MHz - 800MHz, UMC 90nm SP process
Input 66M-100MHz, output 400M-800MHz, frequency synthesizable PLL, UMC 90nm SP Logic process....
1753
0.118
PLL (Frequency Synthesizer) IP, Input: 80MHz - 150MHz, Output: 80MHz - 150MHz, UMC 0.13um HS/FSG process
Input 80M-150MHz, output 80M-150MHz, frequency synthesizable PLL, UMC 0.13um Logic EHS/FSG process....
1754
0.118
PLL (Mini-PLL) IP, Input: 20MHz - 200MHz, Output: 31.5MHz - 500MHz, UMC 65nm SP process
miniPLL (TM) Phase-Locked Loop (PLL) with an operating frequency range of between 31.5MHz and 500MHz, UMC 65nm SP/RVT Low-K Logic process....
1755
0.118
PLL (Spread Spectrum) IP, 20MHz - 70MHz, UMC 0.18um G2 process
UMC 0.18um GII Logic process 20MHz-70MHz delay-type spread-spectrum clock generator....
1756
0.118
PLL (Spread Spectrum) IP, Input: 25MHz, Output: 5GHz, UMC 0.11um HS/FSG process
5GHz SSCG with 25MHz reference clock, UMC 0.11um 20T HS/FSG Logic process....
1757
0.118
PLL (Spread Spectrum) IP, Input: 5MHz - 1280MHz, Output: 15.625MHz - 2000MHz, UMC 55nm LP process
Input 20M-135MHz, output 20M-135MHz SSCG, UMC 0.18um Logic process....
1758
0.118
PLL (Spread Spectrum) IP, UMC 40nm LP process
Input clock:8MHz, output clock range:720 ~ 1680MHz wide-range SSCG, UMC 40nm LP process....
1759
0.118
PLL (Spread Spectrum) IP, UMC 40nm LP process
Input clock range:5 ~ 1280MHz, output clock range:15.625 ~ 2000MHz wide-range SSCG, UMC UMC 40nm LP/LVT Low-K Logic process....
1760
0.118
DLL IP, Input: 100MHz - 400MHz, Output: 100MHz - 400MHz, UMC 0.11um HS/FSG process
Input 100M~400MHz, Output 100M~400MHz DLL-based cell that generates two-channel DQS with 25% timing delay, UMC 0.11um HS/RVT Logic process....
1761
0.118
PLL IP, Input: 10MHz - 200MHz, Outout: 50MHz - 1000MHz, UMC 90nm SP process
This Phase-Locked Loop (PLL) based clock multiplier....
1762
0.118
PLL IP, Input: 10MHz - 200MHz, Output: 25MHz - 400MHz, UMC 0.13um SP/FSG process
Output frequency 25M~400MHz PLL, UMC 0.13um SP/FSG Logic process....
1763
0.118
DLL IP, Input: 18MHz - 45MHz, Output: 18 - 45MHz, UMC 90nm SP process
Input 18M-45MHz, output 18M-45MHz, timing generator DLL, UMC 90nm SP/RVT Low-K process....
1764
0.118
PLL IP, Input: 20MHz - 200MHz, Output: 250MHz - 500MHz, UMC 0.13um HS/FSG process
The FXPLL130HC0H is a phase locked loop with an operating range of 250M~500MHz, UMC 0.13um HS/FSG Logic process....
1765
0.118
PLL IP, Input: 20MHz - 24MHz, Output: 20MHz - 100MHz, UMC 0.5um process
Input 20M-24MHz, output 20M-100MHz, frequency synthesizable PLL, 0.5um Logic process....
1766
0.118
PLL IP, Input: 25MHz, Output: 156.25MHz, UMC 40nm LP process
Jitter clean integer-N LC-PLL for serdes, output frequency is 156.25M, input frequency is 25M for Low-Jitter Mode, 156.25M for JitteRClean Mode. UMC 4...
1767
0.118
PLL IP, Input: 25MHz/50MHz/100MHz/125MHz, Output: 25MHz/125MHz/1.25GHz, UMC 0.13um HS/FSG process
high speed clock generator using UMC 0.13um 1.2V HS process....
1768
0.118
PLL IP, Input: 32.768KHz, Output: 12MHz - 30MHz, UMC 90nm SP process
Input 32.768KHz, output 12M-30MHz, PLL, UMC 90nm SP/RVT Logic Low-K process....
1769
0.118
PLL IP, Input: 32.768KHz, Output: 12MHz - 48MHz, UMC 0.11um HS/FSG process
Input 32.768KHz, output 12M-48MHz, PLL, UMC 0.11um HS/Copper Logic process....
1770
0.118
PLL IP, Input: 32.768KHz, Output: 12MHz, UMC 0.153um G2 process
Input 32.768KHz, output 12MHz, PLL, UMC 0.153um GII Logic/MM process....
1771
0.118
PLL IP, Input: 372M - 540MHz, Output: 5MHz - 400MHz, UMC 0.13um HS/FSG process
Input 372M ~ 540MHz, output 5M ~ 400MHz, PLL, UMC 0.13um HS/FSG Logic process....
1772
0.118
PLL IP, Input: 372M - 540MHz, Output: 5MHz - 420MHz, UMC 0.11um HS/FSG process
Input 372M ~ 540MHz, output 5M ~ 420MHz, PLL, UMC 0.11um HS/FSG Logic process....
1773
0.118
DLL IP, Input: 800MHz - 1600MHz, Output: 800MHz - 1600MHz, UMC 28nm HPM process
Input 800M-1600MHz, output 800M-1600MHz, all digital slave delay line of FXADDLL340HJ0G to generate 25% delay in period of FREF, UMC 28nm Logic and Mi...
1774
0.118
UMC 0.13um LL process PCI I/O cells. These I/O cells are designed to meet PCI-33 and PCI-66 applications. This IP is branched from 'FSC0L_D_50VT_PCI3366_IO'
UMC 0.13um LL process PCI I/O cells. These I/O cells are designed to meet PCI-33 and PCI-66 applications. This IP is branched from 'FSC0L_D_50VT_PCI33...
1775
0.118
Analog Front End IP for CMOS image processing applications
FXAFE010HF0A is an Analog Front End IP for CMOS image processing applications. FXAFE010HF0A is fabricated in UMC 55nm SP, low-k, logic process to enab...
1776
0.118
One Port Register File Compiler IP, Bit-cell: 0.425um2 (HVT), Support retention and deep sleep modes with built-in power gating circuitry., UMC 55nm LP process
UMC 55um LP Low-K process One Port Register File compiler....
1777
0.118
One Port Register File Compiler IP, Bit-cell: 0.425um2 (HVT), UMC 55nm LP process
UMC 55nm LP Logic process 0.425um2-Bit cell One Port Register File memory compiler....
1778
0.118
One Port Register File Compiler IP, HJTC 0.18um pFlash process
HJTC 0.18um pFlash process synchronous Single Port Register File memory compiler....
1779
0.118
One Port Register File Compiler IP, UMC 0.11um CIS process
UMC 0.11um CMOS Image Sensor 2P3M process synchronous high density Single Port Register File SRAM memory compiler....
1780
0.118
One Port Register File Compiler IP, UMC 0.11um HS/AE process
UMC 0.11um HS/AE (AL Advanced Enhancement) Logic process 1.41um2 cell One Port Register File memory compiler....
1781
0.118
One Port Register File Compiler IP, UMC 0.11um HS/AE process
UMC 0.11um AE eFlash HS process for One Port Register File compiler....
1782
0.118
One Port Register File Compiler IP, UMC 0.11um HS/AE process
UMC 0.11um HS/AE (AL Advanced Enhancement) Logic process synchronous high density Single Port Register File SRAM memory compiler....
1783
0.118
One Port Register File Compiler IP, UMC 0.11um HS/FSG process
UMC 0.11um HS/FSG Logic process, One Port Register File memory compiler....
1784
0.118
One Port Register File Compiler IP, UMC 0.11um HS/FSG process
UMC 0.11um HS Logic process synchronous Single Port Register File memory compiler....
1785
0.118
One Port Register File Compiler IP, UMC 0.11um LL process
UMC 0.11um AE/LL eFlash process One Port Register File....
1786
0.118
One Port Register File Compiler IP, UMC 0.11um LL process
UMC 0.11um LL/FSG process synchronous Single Port Register File SRAM memory compiler....
1787
0.118
One Port Register File Compiler IP, UMC 0.11um LL/AE process
UMC 0.11um LL/AE (AL Advanced Enhancement) Logic process 1.41um2 cell Single Port Register File (One Port Register File) memory compiler....
1788
0.118
One Port Register File Compiler IP, UMC 0.11um LL/AE process
UMC 0.11um LL/AE (AL Advanced Enhancement) Logic process standard asynchronous high density Single Port Register File SRAM memory compiler....
1789
0.118
One Port Register File Compiler IP, UMC 0.11um SP/AE process
UMC 0.11um SP/AE Logic process Synchronous One Port Register File memory compiler with 1.41um2-Bit cell....
1790
0.118
One Port Register File Compiler IP, UMC 0.11um SP/AE process
UMC 0.11um SP/AE (AL Advance Enhancement) Logic process synchronous high density Single Port Register File SRAM memory compiler....
1791
0.118
One Port Register File Compiler IP, UMC 0.13um CIS process
UMC 130nm CMOS Image SensorCu process One Port Register File compiler....
1792
0.118
One Port Register File Compiler IP, UMC 0.13um CIS process
UMC 0.13um 2P4M 1.5V CMOS Image Sensor process synchronous Single Port Register File SRAM compiler....
1793
0.118
One Port Register File Compiler IP, UMC 0.13um HS/FSG process
UMC 0.13um HS/LL fusion (FSG) process high density synchronous Single Port Register File SRAM memory compiler....
1794
0.118
One Port Register File Compiler IP, UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG Logic process synchronous Single Port Register File SRAM memory compiler....
1795
0.118
One Port Register File Compiler IP, UMC 0.13um LL process
UMC 0.13um LL Logic/FSG process high density synchronous Single Port Register File SRAM memory compiler....
1796
0.118
One Port Register File Compiler IP, UMC 0.13um SP process
UMC 0.13-micron 1.2V high speed (HS) Logic process synchronous Low Power Single Port Register File SRAM compiler....
1797
0.118
One Port Register File Compiler IP, UMC 0.13um SP/FSG process
UMC 0.13um SP/FSG Logic process high density synchronous Single Port Register File SRAM memory compiler....
1798
0.118
One Port Register File Compiler IP, UMC 0.153um MS process
UMC 0.153um Mixed-Mode/Logic process synchronous high density Single Port Register File SRAM memory compiler....
1799
0.118
One Port Register File Compiler IP, UMC 0.15um SP process
UMC 0.15um SP Logic process synchronous Single Port Register File SRAM memory compiler....
1800
0.118
One Port Register File Compiler IP, UMC 0.162um G2 process
UMC 0.162um GII Logic process synchronous high density Single Port Register File SRAM memory compiler....