Design & Reuse
Catalog of SIP Cores
System on Chip design resources
939 IP
301
7.0
MIPI RX PHY in SMIC28nm
MIPI RX PHY is a mass production IP for D-PHY v1.2 and C-PHY v1.2 protocols. It includes a total of 5 Lanes, among which there are 4 data lanes and 1...
302
7.0
DSC decoder IP
DSC decoder IP is compliant with standard VESA Display Stream Compression version 1.1/1.2/1.2a....
303
6.5077
MIPI C-PHY 8Gsps / D-PHY 9Gbps TRX Combo PHY (2nm)
The MIPI D-PHY/C-PHY Combo IP supports data rates of up to 9Gbps for D-PHY and 8Gsps for C-PHY. It operates in High-Speed (HS), Low-Power (LP), and Es...
304
6.5077
MIPI C-PHY TRx 2.5Gsps / D-PHY TRx 4.5Gbps Combo PHY (4nm)
The MIPI D-PHY/C-PHY Combo IP supports data rates of up to 4.5Gbps for D-PHY and 2.5Gsps for C-PHY. It operates in High-Speed (HS), Low-Power (LP), an...
305
6.5077
MIPI C-PHY TRx 2.5Gsps / D-PHY TRx 4.5Gbps Combo PHY (5nm)
The MIPI D-PHY/C-PHY Combo IP supports data rates of up to 4.5Gbps for D-PHY and 2.5Gsps for C-PHY. It operates in High-Speed (HS), Low-Power (LP), an...
306
6.5077
MIPI C-PHY TRx 2.5Gsps / D-PHY TRx 4.5Gbps Combo PHY (5nm)
The MIPI D-PHY/C-PHY Combo IP supports data rates of up to 4.5Gbps for D-PHY and 2.5Gsps for C-PHY. It operates in High-Speed (HS), Low-Power (LP), an...
307
6.5077
MIPI C-PHY TRx 2.5Gsps / D-PHY TRx 4.5Gbps Combo PHY (8nm)
The MIPI D-PHY/C-PHY Combo IP supports data rates of up to 4.5Gbps for D-PHY and 2.5Gsps for C-PHY. It operates in High-Speed (HS), Low-Power (LP), an...
308
6.5077
MIPI C-PHY TRx 2.5Gsps) / D-PHY TRx 4.5Gbps Combo PHY (8nm)
The MIPI D-PHY/C-PHY Combo IP supports data rates of up to 4.5Gbps for D-PHY and 2.5Gsps for C-PHY. It operates in High-Speed (HS), Low-Power (LP), an...
309
6.5077
MIPI C-PHY TRx 8Gsps (5nm)
The MIPI C-PHY IP supports data rates of up to 8Gsps. It operates in High-Speed (HS), Low-Power (LP), and Escape modes, where High-Speed mode provides...
310
6.5077
MIPI C-PHY TRx 8Gsps / D-PHY TRx 9Gbps Combo PHY (4nm)
The MIPI D-PHY/C-PHY Combo IP supports data rates of up to 9Gbps for D-PHY and 8Gsps for C-PHY. It operates in High-Speed (HS), Low-Power (LP), and Es...
311
6.5077
MIPI C-PHY TRx(80-8000Msps) / MIPI D-PHY TRx(80-9000Mbps) Combo PHY (4nm)
The MIPI D-PHY/C-PHY Combo IP supports data rates of up to 9Gbps for D-PHY and 8Gsps for C-PHY. It operates in High-Speed (HS), Low-Power (LP), and Es...
312
6.5077
MIPI CSI-2 RX Controller
The Camera Serial Interface 2 (CSI-2) Receiver (RX) Controller is a digital core that implements all protocol functions defined in the MIPI Alliance S...
313
6.5077
MIPI CSI-2 TX Controller
The Cameta Serial Interface 2 (CSI-2) Transmitter (TX) Controller is a digital core that implements all protocol functions defined in the MIPI Allianc...
314
6.5077
MIPI D-PHY TRx 2.1Gbps (14nm)
The MIPI D-PHY IP supports data rates of up to 2.1Gbps. It operates in High-Speed (HS), Low-Power (LP), and Escape modes, where High-Speed mode provid...
315
6.5077
MIPI D-PHY TRx (5nm)
The MIPI D-PHY IP is a hardmacro PHY for CSI RX or DSI TX. IO pads and ESD structures are included. Extensive built-in self test features such as loop...
316
6.5077
MIPI D-PHY TRx 2.1Gbps (14nm)
The MIPI D-PHY IP supports data rates of up to 2.1Gbps. It operates in High-Speed (HS), Low-Power (LP), and Escape modes, where High-Speed mode provid...
317
6.5077
MIPI D-PHY TRx 2.5Gbps (11nm)
The MIPI D-PHY IP supports data rates of up to 2.5Gbps. It operates in High-Speed (HS), Low-Power (LP), and Escape modes, where High-Speed mode provid...
318
6.5077
MIPI D-PHY TRx 2.5Gbps (14nm)
The MIPI D-PHY IP supports data rates of up to 2.5Gbps. It operates in High-Speed (HS), Low-Power (LP), and Escape modes, where High-Speed mode provid...
319
6.5077
MIPI D-PHY TRx 2.5Gbps (14nm)
The MIPI D-PHY IP supports data rates of up to 2.5Gbps. It operates in High-Speed (HS), Low-Power (LP), and Escape modes, where High-Speed mode provid...
320
6.5077
MIPI D-PHY TRx 2.5Gbps (14nm)
The MIPI D-PHY IP supports data rates of up to 2.5Gbps. It operates in High-Speed (HS), Low-Power (LP), and Escape modes, where High-Speed mode provid...
321
6.5077
MIPI D-PHY TRx 2.5Gbps (28nm)
The MIPI D-PHY IP supports data rates of up to 2.5Gbps. It operates in High-Speed (HS), Low-Power (LP), and Escape modes, where High-Speed mode provid...
322
6.5077
MIPI D-PHY TRx 4.5Gbps (5nm)
The MIPI D-PHY IP supports data rates of up to 4.5Gbps. It operates in High-Speed (HS), Low-Power (LP), and Escape modes, where High-Speed mode provid...
323
6.5077
MIPI D-PHY TRx 4.5Gbps (8nm)
The MIPI D-PHY IP supports data rates of up to 4.5Gbps. It operates in High-Speed (HS), Low-Power (LP), and Escape modes, where High-Speed mode provid...
324
6.5077
MIPI DSI-2 RX Controller
The Display Serial Interface 2 (DSI-2) Receiver (RX) Controller is a digital core that implements all protocol functions defined in the MIPI Alliance ...
325
6.5077
MIPI DSI-2 TX Controller
The Display Serial Interface 2 (DSI-2) Transmitter (TX) Controller is a digital core that implements all protocol functions defined in the MIPI Allian...
326
6.5077
USB Super Speed+ PHY (4nm)
The USB PHY IP consists of a hard macro PMA and soft macro PCS compliant with USB 3.2 specification, supporting SuperSpeed+ (10 Gbps) operation. This ...
327
6.5077
Multi-Standard SerDes PHY (4nm)
The MSS PHY IP consists of a hard macro PMA architecture supporting multi-standard NRZ signaling up to 20 Gbps, compliant with PCIe Gen4, DisplayPort ...
328
6.0
A 32Gbps SerDes PHY in GlobalFoundries 22FDX
This 32 Gbps SerDes PHY is implemented in GlobalFoundries 22FDX CMOS technology and provides a high-performance, protocol-agnostic serial interface fo...
329
6.0
Nano power DC-DC converter with ultra-low quiescent current and high efficiency at light load in TSMC 22ULL
DCDC-ULP-LS-T22ULL-1.62-3.63-0.6-2.5-01b_TSMC_22_ULL is a Nano power DC-DC converter in TSMC 22ULL with ultra-low quiescent current and high efficienc...
330
6.0
RapidIO PHY
RapidIO is a high performance, low pin count, packet switched, full duplex, system level interconnect architecture. The architecture addresses the nee...
331
6.0
SMIC40nm Integer-N PLL, 600M-2.4G
This present IP is a self-biased Phase Locked Loop (PLL) circuit, which can cover 600MHz-2.4GHz vco output frequency. It can generate adjustable clock...
332
6.0
TSMC12nm Integer-N PLL, 800M-3.2G
This present IP is a charge-pump Phase Locked Loop (PLL) circuit, which can cover 800MHz-3200MHz vco output frequency. It consists blocks of M divider...
333
5.5077
112Gb/s PAM4 SERDES PHY (14nm)
The Ethernet PHY IP is used for CEI-112G applications and serializes 8b/10b encoded data for Gen1 and Gen2, as well as 128b/130b encoded data for Gen3...
334
5.5077
eDP v1.5a RX PHY (14nm)
The eDP RX PHY supports a maximum data rate of up to HBR3 (8.1Gbps), and the general mode supports a maximum data rate of up to 4Gbps. This core IP is...
335
5.5077
eDP v1.5a RX PHY (14nm)
The eDP RX PHY supports a maximum data rate of up to HBR3 (8.1Gbps), and the general mode supports a maximum data rate of up to 4Gbps. This core IP is...
336
5.5077
eDP v1.5a RXPHY (14nm)
The eDP RX PHY supports a maximum data rate of up to HBR3 (8.1 Gbps), and the general mode supports a maximum data rate of up to 4 Gbps. This core IP ...
337
5.5077
MIPI D-PHY TRx 2.15Gbps (28nm)
The MIPI D-PHY IP supports data rates of up to 2.15Gbps. It operates in High-Speed (HS), Low-Power (LP), and Escape modes, where High-Speed mode provi...
338
5.5077
MIPI D-PHY TRx 2.1Gbps (14nm)
The MIPI D-PHY IP supports data rates of up to 2.1Gbps. It operates in High-Speed (HS), Low-Power (LP), and Escape modes, where High-Speed mode provid...
339
5.5077
SLVS-EC 2.0 RX PHY (14nm)
The SLVS-EC Receiver PHY IP consists of a hard macro architecture compliant with SLVS-EC version 2.0 specification, supporting data rate up to 10 Gbps...
340
5.5077
SLVS-EC 3.0 RX PHY (4nm)
The SLVS-EC Receiver PHY IP consists of a hard macro architecture compliant with SLVS-EC version 3.0 specification, supporting data rate up to 10 Gbps...
341
5.5077
Intra-Panel Multi Strandard Low-Power TX PHY (28nm)
The Intra-Panel TX PHY is a COG and COF transmitter supporting up to 3.2Gbps data rate with low power consumption. It features a DC-coupled differenti...
342
5.5077
Intra-Panel Multi Strandard TX PHY (14nm)
The Intra-Panel TX PHY is a COG and COF transmitter supporting up to 3.6Gbps data rate with low power consumption. It features a DC-coupled differenti...
343
5.5077
Intra-Panel Multi Strandard TX PHY (8nm)
The Intra-Panel TX PHY is a COG and COF transmitter supporting up to 4.0Gbps data rate with low power consumption. It features a DC-coupled differenti...
344
5.5077
DP 1.4 / eDP v1.4b TXPHY (14nm)
The eDP v1.4b TX PHY IP consists of a hard macro architecture supporting embedded DisplayPort v1.4 specification with data rates up to 8.1 Gbps per la...
345
5.5077
DP 1.4 / eDP v1.4b TXPHY (8nm)
The eDP v1.4b TX PHY IP consists of a hard macro architecture supporting embedded DisplayPort v1.4 specification with data rates up to 8.1 Gbps per la...
346
5.5077
DP 2.1a / eDP v2.0 RXPHY (4nm)
The DP/eDP RX PHY consists of hardmacro PHY compliant to DP v2.1a and eDP v2.0 specification, supporting maximum data rate of up to UHBR(20Gbps) opera...
347
5.5077
DP 2.1a / eDP v2.0 TXPHY (4nm)
The DP/eDP TX PHY consists of hardmacro PHY compliant to DP v2.1a and eDP v2.0 specification, supporting maximum data rate of up to UHBR(20Gbps) opera...
348
5.5077
DSC 1.2b Decoder
The DSC 1.2b Decoder is an efficient video decompression IP that complies with the VESA Display Stream Compression (DSC) 1.2b standard. Optimized for ...
349
5.5077
DSC 1.2b Encoder
The DSC 1.2b Encoder is an efficient video compression IP that complies with the VESA Display Stream Compression (DSC) 1.2b standard. Optimized for lo...
350
5.0556
A 2Gbps LVDS Tranceiver in TSMC 28nm
This 1.8V LVDS transceiver, designed for TSMCs 28nm process, delivers high-speed, low-power differential signaling with superior signal integrity. Eng...