Design & Reuse
1740 IP
1401
0.118
UMC 40nm LP/RVT Logic Process SYNS-like 9T POWERSLASH Cell Library
UMC 40nm LP/RVT Logic Process SYNS-like 9T POWERSLASH Cell Library...
1402
0.118
UMC 40nm uLP Logic Process 1-Port Register File with Peri-HVT
UMC 40nm uLP Logic Process 1-Port Register File with Peri-HVT...
1403
0.118
UMC 40nm uLP/HVT Logic Process SYNS-like 7T GENERIC CORE Cell Library
UMC 40nm uLP/HVT Logic Process SYNS-like 7T GENERIC CORE Cell Library...
1404
0.118
UMC 40nm uLP/HVT Logic Process SYNS-like 9T GENERIC CORE Cell Library
UMC 40nm uLP/HVT Logic Process SYNS-like 9T GENERIC CORE Cell Library...
1405
0.118
UMC 40nm uLP/LVT Logic Process SYNS-like 7T GENERIC CORE Cell Library
UMC 40nm uLP/LVT Logic Process SYNS-like 7T GENERIC CORE Cell Library...
1406
0.118
UMC 40nm uLP/LVT Logic Process SYNS-like 9T GENERIC CORE Cell Library
UMC 40nm uLP/LVT Logic Process SYNS-like 9T GENERIC CORE Cell Library...
1407
0.118
UMC 40nm uLP/RVT Logic Process SYNS-like 7T GENERIC CORE Cell Library
UMC 40nm uLP/RVT Logic Process SYNS-like 7T GENERIC CORE Cell Library...
1408
0.118
UMC 40nm uLP/RVT Logic Process SYNS-like 9T GENERIC CORE Cell Library
UMC 40nm uLP/RVT Logic Process SYNS-like 9T GENERIC CORE Cell Library...
1409
0.118
UMC 55nm e-flash Logic Process , 3.3V Analog ESD IO cell Library
UMC 55nm e-flash Logic Process , 3.3V Analog ESD IO cell Library...
1410
0.118
UMC 55nm e-flash Logic Process OSC High IO Library
UMC 55nm e-flash Logic Process OSC High IO Library...
1411
0.118
UMC 55nm e-flash Logic Process OSC High IO Library
UMC 55nm e-flash Logic Process OSC High IO Library...
1412
0.118
UMC 55nm eFlash/HVT Logic Process 7-track ECO_M1 cell library
UMC 55nm eFlash/HVT Logic Process 7-track ECO_M1 cell library...
1413
0.118
UMC 55nm eFlash/HVT Logic Process 7-track Genernic Core cell library
UMC 55nm eFlash/HVT Logic Process 7-track Genernic Core cell library...
1414
0.118
UMC 55nm eFlash/HVT Logic Process 7-track PowerSlash Kit cell library
UMC 55nm eFlash/HVT Logic Process 7-track PowerSlash Kit cell library...
1415
0.118
UMC 55nm eFlash/HVT Logic Process High Speed 12-track ECO_M1 cell library
UMC 55nm eFlash/HVT Logic Process High Speed 12-track ECO_M1 cell library...
1416
0.118
UMC 55nm eFlash/HVT Logic Process High Speed 12-track Genernic Core cell library
UMC 55nm eFlash/HVT Logic Process High Speed 12-track Genernic Core cell library...
1417
0.118
UMC 55nm eFlash/HVT Logic Process High Speed 12-track PowerSlash Kit cell library
UMC 55nm eFlash/HVT Logic Process High Speed 12-track PowerSlash Kit cell library...
1418
0.118
UMC 55nm eFlash/HVT LowK Logic Process 8-track POWERSLASH Core Library
UMC 55nm eFlash/HVT LowK Logic Process 8-track POWERSLASH Core Library...
1419
0.118
UMC 55nm eFlash/HVT LowK Logic Process 8-track Standard Core Library
UMC 55nm eFlash/HVT LowK Logic Process 8-track Standard Core Library...
1420
0.118
UMC 55nm eFlash/HVT LowK Logic Process 8-track Standard Core Library
UMC 55nm eFlash/HVT LowK Logic Process 8-track Standard Core Library...
1421
0.118
UMC 55nm eFlash/LVT Logic Process 7-track ECO_M1 Generic cell library
UMC 55nm eFlash/LVT Logic Process 7-track ECO_M1 Generic cell library...
1422
0.118
UMC 55nm eFlash/LVT Logic Process 7-track Genernic Core cell library
UMC 55nm eFlash/LVT Logic Process 7-track Genernic Core cell library...
1423
0.118
UMC 55nm eFlash/LVT Logic Process 7-track PowerSlash Kit cell library
UMC 55nm eFlash/LVT Logic Process 7-track PowerSlash Kit cell library...
1424
0.118
UMC 55nm eFlash/LVT LowK Logic Process 8-track Standard Core Library
UMC 55nm eFlash/LVT LowK Logic Process 8-track Standard Core Library...
1425
0.118
UMC 55nm eFlash/LVT LowK Logic Process 8-track Standard Core Library
UMC 55nm eFlash/LVT LowK Logic Process 8-track Standard Core Library...
1426
0.118
UMC 55nm eFlash/LVT LowK Logic Process 8-track Standard Core Library
UMC 55nm eFlash/LVT LowK Logic Process 8-track Standard Core Library...
1427
0.118
UMC 55nm eFlash/RVT Logic Process 7-track ECO_M1 cell library
UMC 55nm eFlash/RVT Logic Process 7-track ECO_M1 cell library...
1428
0.118
UMC 55nm eFlash/RVT Logic Process 7-track Genernic Core cell library
UMC 55nm eFlash/RVT Logic Process 7-track Genernic Core cell library...
1429
0.118
UMC 55nm eFlash/RVT Logic Process 7-track PowerSlash Kit cell library
UMC 55nm eFlash/RVT Logic Process 7-track PowerSlash Kit cell library...
1430
0.118
UMC 55nm eFlash/RVT Logic Process High Speed 12-track ECO_M1 cell library
UMC 55nm eFlash/RVT Logic Process High Speed 12-track ECO_M1 cell library...
1431
0.118
UMC 55nm eFlash/RVT Logic Process High Speed 12-track Genernic Core cell library
UMC 55nm eFlash/RVT Logic Process High Speed 12-track Genernic Core cell library...
1432
0.118
UMC 55nm eFlash/RVT Logic Process High Speed 12-track PowerSlash Kit cell library
UMC 55nm eFlash/RVT Logic Process High Speed 12-track PowerSlash Kit cell library...
1433
0.118
UMC 55nm eFlash/RVT LowK Logic Process 8-track ECO_M1 cell Library
UMC 55nm eFlash/RVT LowK Logic Process 8-track ECO_M1 cell Library...
1434
0.118
UMC 55nm eFlash/RVT LowK Logic Process 8-track Genernic Core cell Library
UMC 55nm eFlash/RVT LowK Logic Process 8-track Genernic Core cell Library...
1435
0.118
UMC 55nm eFlash/RVT LowK Logic Process 8-track PowerSlash Kit cell Library
UMC 55nm eFlash/RVT LowK Logic Process 8-track PowerSlash Kit cell Library...
1436
0.118
UMC 55nm Logic and Mixed-Mode Ultra Low Power / HVT Low-K Process 5V Tolerant BOAC I/O cell library
UMC 55nm Logic and Mixed-Mode Ultra Low Power / HVT Low-K Process 5V Tolerant BOAC I/O cell library...
1437
0.118
UMC 55nm Logic and Mixed-Mode Ultra Low Power Low-K Process 1.8V/2.5V/3.3V multi-voltage BOAC I/O cell library
UMC 55nm Logic and Mixed-Mode Ultra Low Power Low-K Process 1.8V/2.5V/3.3V multi-voltage BOAC I/O cell library...
1438
0.118
UMC 55nm Logic process standard synchronous Contact ROM memory compiler.
UMC 55nm Logic process standard synchronous Contact ROM memory compiler....
1439
0.118
UMC 55nm Logic process standard synchronous Contact ROM memory compiler.
UMC 55nm Logic process standard synchronous Contact ROM memory compiler....
1440
0.118
UMC 55nm Low-K/Low-Power Logic process synchronous ultra-high-speed single-port SRAM compiler.
UMC 55nm Low-K/Low-Power Logic process synchronous ultra-high-speed single-port SRAM compiler....
1441
0.118
UMC 55nm LP/LVT Logic Process MPCA cell library_x005F_x005F_x005F_x005F_x005F_x000D_ _x005F_x005F_x005F_x005F_x005F_x000D_
UMC 55nm LP/LVT Logic Process MPCA cell library...
1442
0.118
UMC 55nm LP/RVT Logic Process MPCA cell library_x005F_x005F_x005F_x005F_x005F_x000D_
UMC 55nm LP/RVT Logic Process MPCA cell library...
1443
0.118
UMC 55nm LP/RVT Low-K logic process, Operating frequency 80MHz-320MHz, DQS delay 6.25%-50%.
UMC 55nm LP/RVT Low-K logic process, Operating frequency 80MHz-320MHz, DQS delay 6.25%-50%....
1444
0.118
UMC 55nm LP/RVT LowK Logic Process 2.5VOD3.3V device RTC Core Library
UMC 55nm LP/RVT LowK Logic Process 2.5VOD3.3V device RTC Core Library...
1445
0.118
UMC 55nm SP-RVT 1P10M Logic Process 1.8V/3.3V multi-voltage BOAC I/O cell library
UMC 55nm SP-RVT 1P10M Logic Process 1.8V/3.3V multi-voltage BOAC I/O cell library...
1446
0.118
UMC 55nm SP/RVT LowK Logic Process True 3.3V Generic IO Cell Library
UMC 55nm SP/RVT LowK Logic Process True 3.3V Generic IO Cell Library...
1447
0.118
UMC 55nm SP/RVT LowK Logic Process True 3.3V Low Frequency OSC IO Cell Library
UMC 55nm SP/RVT LowK Logic Process True 3.3V Low Frequency OSC IO Cell Library...
1448
0.118
UMC 55nm SST/ulp Logic process standard synchronous high density single port SRAM memory compiler.
UMC 55nm SST/ulp Logic process standard synchronous high density single port SRAM memory compiler....
1449
0.118
UMC 55nm Standard Performance LowK Logic Process Two-Port Register File
UMC 55nm Standard Performance LowK Logic Process Two-Port Register File...
1450
0.118
UMC 55nm uLP LowK Logic Process One Port Register File with forward biased and UHVT periphery
UMC 55nm uLP LowK Logic Process One Port Register File with forward biased and UHVT periphery...