Design & Reuse
Catalog of SIP Cores
System on Chip design resources
4984 IP
951
0.0
16x8 Bits OTP (One-Time Programmable) IP, TSM- CM018G 0.18μm 1.8V/3.3V Process
The ATO00016X8TS180CMG3NA is organized as 16 bits by 8 one-time programmable (OTP) in 8-bit read and 1-bit program modes. This is a kind of non-volati...
952
0.0
16x8 Bits OTP (One-Time Programmable) IP, VI- 150nm 1.8V BCD Process
The ATO00016X8VI150BG22NA is organized as 16 bits by 8 one-time programmable in 8-bit read and 1-bit program modes. This is a kind of non-volatile m...
953
0.0
16x8 Bits OTP (One-Time Programmable) IP, X-FA- 0.18um XH018 1.8V/3.3V process
The ATO00016X8XH18018P4DA is organized as a 16-bit by 8 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in 0.18µm XH018...
954
0.0
Advanced Driver Assistance System Platform
SPHE6702 is an enhanced computing power platform of Sunplus ADAS (Advanced Driver Assistance System) SOC family. Featuring four high performance Corte...
955
0.0
8Kx16 Bits OTP (One-Time Programmable) IP, D- HiTe- AN180 1.8V / 5V Process
The ATO008KX16DB180AO15NA is organized as 8Kx16 One-Time Programmable in 16-bit read and 1-bit program modes. This is a kind of non-volatile memory su...
956
0.0
8Kx16 Bits OTP (One-Time Programmable) IP, VI- 110nm E-Flash 1.5V/3.3V Process
The ATO008KX16VI110EFM5DA I-fuse® IP is organized as 8Kx16 bits one-time programmable (OTP). This is a kind of non-volatile memory fabricated in VI- 1...
957
0.0
1Kx32 Bits OTP (One-Time Programmable) IP, TSM- 40ULP 1.1/2.5V Process
The AT1K32T40ULP6AA is organized as a 1K-bit by 32 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in TSM- 40ULP 1.1/2.5...
958
0.0
8Kx8 Bits OTP (One-Time Programmable) IP, MXI- 0.18μm 1.8V/5V Logic/BCD Process
The ATO0008KX8MX180LBX4DA is organized as an 8K-bits by 8 one-time programmable memory. This is a kind of non-volatile memory fabricated in MXI- 0.1...
959
0.0
8Kx8 Bits OTP (One-Time Programmable) IP, MXI- 0.18μm 1.8V/5V Logic/BCD Process
The ATO0008KX8MX180LBX4DC is organized as a 8k x 8 one-time programmable in parallel mode. This is a kind of non-volatile memory fabricated in MXIC 0....
960
0.0
8Kx8 Bits OTP (One-Time Programmable) IP, MXI- 0.18μm 1.8V/5V Logic/BCD Process
The ATO0008KX8MX180LBX4DO is organized as a 8k x 8 one-time programmable in parallel mode. This is a kind of non-volatile memory fabricated in MXIC 0....
961
0.0
4kx8 Bits OTP (One-Time Programmable) IP, Ne-chi- LCDDr 55nm 1.2V/6V Process
The ATO0004KX8NX055LCD4NA is organized as 4K x 8 one-time programmable (OTP). This is a type of non-volatile memory fabricated in Nexchip LCDDr 55nm ...
962
0.0
4Kx8 Bits OTP (One-Time Programmable) IP, TSM- 0.18µm 1.8V/5V Mixed-Signal Process
The ATO0004KX8TS180MSS3NA is organized as a 4Kx8 one-time programmable in parallel mode. This is a kind of non-volatile memory fabricated in TSM- 0.18...
963
0.0
1Kx8 Bits OTP (One-Time Programmable) IP, TSM- 40ULP 1.1/2.5V Process
The ATO0001KX8TS040ULP5ZA is organized as 1 kb x 8 one-time programmable (OTP). This is a type of non-volatile memory fabricated in TSM- 40nm ULP 1.1V...
964
0.0
2kx8 Bits OTP (One-Time Programmable) IP, TSM- 40ULP 1.1/2.5V Process
The ATO0002KX8TS040ULP5ZH is organized as 2 kb x 8 one-time programmable (OTP). This is a type of non-volatile memory fabricated in TSM- 40nm ULP 1.1V...
965
0.0
2kx8 Bits OTP (One-Time Programmable) IP, VI- 0.18µm standard CMOS mixed-signal process
The AT2K8V180MM0AA is organized as a 2Kx8 one-time programmable in parallel mode. This is a kind of non-volatile memory fabricated in VIS 0.18µm stand...
966
0.0
4Kx8 Bits OTP (One-Time Programmable) IP, VI- 0.15µm 1.8V BCD Process
The AT4K8V150BCD0AA is organized as a 4K-bits by 8 one-time programmable. This is a kind of non-volatile memory fabricated in VI- 0.15um BCD process. ...
967
0.0
4Kx8 Bits OTP (One-Time Programmable) IP, VI- 0.15µm 1.8V/5V BCD GIII Process
The ATO0004KX8VI150BG33NB is organized as a 4K-bits by 8 one-time programmable. This is a kind of non-volatile memory fabricated in VI- 0.15µm BCD GII...
968
0.0
4Kx8 Bits OTP (One-Time Programmable) IP, VI- 0.15µm 1.8V/5V BCD GIII Process
The AT4K8V150BCD0AB is organized as a 4K-bits by 8 one-time programmable. This is a kind of non-volatile memory fabricated in VI- 0.15µm BCD GIII proc...
969
0.0
4Kx8 Bits OTP (One-Time Programmable) IP, VI- 0.15µm 1.8V/5V BCD GIII Process
The ATO0004KX8VI150BG33NA is organized as a 4K-bits by 8 one-time programmable. This is a kind of non-volatile memory fabricated in VI- 0.15µm BCD G...
970
0.0
4Kx8 Bits OTP (One-Time Programmable) IP, VI- 0.15µm 1.8V/6V SOI BCD EPI Process
The ATO0004KX8VI150SOI3XX00A is organized as a 4K-bits by 8 one-time programmable. This is a kind of non-volatile memory fabricated in VI- 0.15µm SO...
971
0.0
8Kx8 Bits OTP (One-Time Programmable) IP, X-FA- 0.18μm XH018 Modular Mixed Signal Process
The ATO0008KX8XH180TG34DA is organized as an 8K-bits by 8 one-time programmable memory. This is a kind of non-volatile memory fabricated in X-FA- 0....
972
0.0
8kx8 Bits OTP (One-Time Programmable) IP, X-FA- 0.18μm XH018 Modular Mixed Signal Process
The ATO0008KX8XF180HMH4DA is organized as a 8k-bit by 8 one-time programmable (OTP). This is a type of non-volatile memory fabricated in X-FA- 0.18μm ...
973
0.0
4Kx9 Bits OTP (One-Time Programmable) IP, Globa-Foundr--- 12LP+ 0.8V/1.8V Process
The ATO0004KX9GF012LPP8ZA is organized as 4K-bits by 9 one-time programmable (OTP). This is a type of non-volatile memory fabricated in Globa-Foundr--...
974
0.0
1x32 Bits OTP (One-Time Programmable) IP, TSM- 0.18μm SiGe BiCMOS 1.8V/3.3V Process
The ATO0001X32TS180SGE3NA is organized as 1 by 32 bits one-time programmable (OTP). This is a kind of non-volatile memory fabricated in 0.18um SiGe Bi...
975
0.0
1x64 Bits OTP (One-Time Programmable) IP, TSM- 0.18μm Mixed-Signal 1.8V/3.3V Process
The AT1X64T180MM0AB is organized as one by 64 bits one-time programmable (OTP). This is a kind of non-volatile memory fabricated in TSM- Mixed-Signal ...
976
20.0
JPEG XL series
JPEG XL is a new still image coding standard established in “ISO/IEC 18181” in 2022/1. - Compared to existing JPEG, it has higher compression and qua...
977
15.0
Original Lossless codec IP core - Full HD 30fps@126MHz (1Sample/clk)
KJN-S1 is able to get Higher performance lossless Compression by original algorithm. This product achieves a smaller circuit scale and higher compress...
978
10.0
Camera ISP IP (Competitive Performance) - ZELKOVA
Zelkova is a comprehensive ISP IP that includes many functionalities for image processing applications. It is optimized for low light environment appl...
979
10.0
Camera ISP IP (High Performance) - METASEQUOIA
METASEQUOIA is a comprehensive ISP IP that includes many functionalities for image processing. It is optimized for high resolution and low light envir...
980
10.0
LDPC
The Configurable LDPC and PHY FEC IP Core is a synthesizable SystemVerilog implementation for encoding and iterative decoding of generic, quasi-cyclic...
981
10.0
OFDM++
The OFDM Transceiver IP Core is a SystemVerilog implementation of configurable OFDM transmit and receive chains. The TX mapper, streaming resource-gri...
982
10.0
MIPI CSI-2 Receiver for FPGA
MIPI CSI-2 Rx - IP core for FPGA which based on CSI-2 standard : Camera - Application Processor....
983
10.0
Visibility Improver IP
“LucidEye” improves the visibility of unclear images such as those deteriorated due to weather conditions (snow, haze, or fog), and dark images due t...
984
10.0
ML-DSA
The ML-DSA IP Core is a synthesizable SystemVerilog implementation of the FIPS 204 module-lattice digital signature standard. It performs key generati...
985
10.0
ML-KEM
The Configurable ML-KEM IP Core is a portable SystemVerilog implementation of the NIST Module-Lattice-Based Key-Encapsulation Mechanism standardized i...
986
10.0
Post-Quantum SLH-DSA IP Core
The Configurable SLH-DSA IP Core is a portable SystemVerilog implementation of the stateless hash-based digital signature algorithm standardized by NI...
987
10.0
JPEG Codec 4K(YUV422) 96fps@200MHz,
The KJN-7EX_LSC conform to the JPEG baseline format/JPEG Extended DCT-based process for compressing/decompressing 8bit/12bit still images. This produ...
988
10.0
JPEG Codec Full HD(YUV422) 30fps@126MHz(1Sample/clk)
The KJN-F1 conform to the JPEG baseline format for compressing/decompressing still images. The F series is a product optimized for FPGA....
989
10.0
JPEG Codec Full HD(YUV422) 30fps@63MHz. (2Sample/clk)
The KJN-F4 conform to the JPEG baseline format for compressing/decompressing still images. The F series is a product optimized for FPGA....
990
10.0
JPEG Encoder 8K (YUV422) 96fps@200MHz. (32Sample/clk)
The KJN-9EX_ENC conform to the JPEG baseline format/JPEG Extended DCT-based process for compressing/decompressing 8bit/12bit still images. This produc...
991
10.0
JPEG Encoder Full HD(YUV422) 48fps@100MHz. (2Sample/clk)
The KJN-4ENC conform to the JPEG baseline format for　compressing/decompressing still images. This product has encoder-only functions....
992
9.0
Camera High Dynamic Range IP - PINE
The PINE with HDR functionality receives a fused Multi-exp. image from the sensor and processes it internally to extend the Dynamic Range of the image...
993
8.0
Camera 3DNR IP - AMUR (ME based)
AMUR is a 3D Noise Reduction (3DNR) IP that effectively reduces noise in digital images. It is optimized for low light environment. AMUR uses Motion E...
994
8.0
Camera 3DNR IP - VINI (MA based)
VINI is a 3D Noise Reduction (3DNR) IP that effectively reduces noise in digital images. It realizes high performance with low gate size and memory us...
995
7.0
Camera LDC (De-warp) IP - GINKGO
GINKGO is an Lens Distortion Correction IP capable of up to 192° angle correction. It comes with factors that can adjust zoom and un-distortion streng...
996
7.0
Camera Scaler IP - DSCALE
DSCALE is an IP that reduces the input image to a specified output size. DSCALE can simultaneously process one input image into four different reduce...
997
6.0
Camera Demosaicing IP - DAISY (RCCC)
The demosaicing is a color filter interpolation method, and refers to an image processing algorithm for restoring full color values of all pixels in a...
998
6.0
Camera Demosaicing IP - LOTUS (RCCB)
The demosaicing is a color filter interpolation method, and refers to an image processing algorithm for restoring full color values of all pixels in a...
999
6.0
Camera Demosaicing IP - ROSE (RGB-IR)
The demosaicing is a color filter interpolation method, and refers to an image processing algorithm for restoring full color values of all pixels in a...
1000
5.0
H.264/AVC 1080 60p Baseline Profile Decoder
TMC's TM21745 is a decoder IP core that is compliant with ISO/IEC 14496-10 | ITU-T Rec.H.264. Using TMC's original computer algorithm, we have real...