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System on Chip design resources
System on Chip design resources
May 25, 2026 -
To support the transition to PCIe 7.0, three companies have introduced new automated testing applications, ultra-low-jitter clock generators, and protocol analysis platforms to bridge critical gaps in the existing market ecosystem.
By Jake Hertz, allaboutcircuits.com
During the recent PCI-SIG Developers Conference in Santa Clara, Keysight Technologies, Diodes Incorporated, and Viavi Solutions each announced new PCIe 7.0 products. As device manufacturers start to adopt the standard, there are naturally shortcomings in the existing market and development ecosystem. Each of the three releases touches on one of these areas where engineers may currently lack dedicated tools.
One of the biggest obstacles for hardware designers using PCIe 7.0 is validating whether the receiver can reliably receive data at 128 GT/s. For earlier PCIe versions, designers manually stress-tested their receivers, but at 128 GT/s, that manual process has become untenable.
Keysight Technologies announced a new PCIe 7.0 Receiver Test application that pairs the M8050A BERT family of test equipment, including the M8042A 120 GBaud pattern generator and M8043A error analyzer, with the N5991PB7A Receiver Test Automation software to automate PCIe 7.0 receiver validation.