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How Intel Foundry uses Foveros stacking, EMIB silicon bridges, and EMIB-T to scale chiplets, bypass the reticle limit, and power massive AI workloads.
August 3, 2026 -
As AI demands unprecedented "brain power," the semiconductor industry is moving past the era of relying on single, massive chips. Advanced packaging is the essential craft of interconnecting multiple specialized chips together. This allows them to function as a single, powerful unit that runs faster handling the massive workloads of the future.
Intel’s been doing advanced chip packaging for years in the U.S. and across the globe. It’s one of the most crucial parts of creating multi-chip packages for today’s technology products.
U.S. Advanced Packaging: Intel’s New Mexico Facilities
Inside Intel's Rio Rancho, New Mexico facilities, advanced packaging technologies are expanding the "reticle limit"—scaling packages to 8x the industry standard today, and over 12x by 2028.
We’ve moved past the era of one big chip to a system of chips, almost like a “silicon mosaic”, where specialized tiles are interconnected in a single, massive package.
“Back in the 1980s this site was the leader in 6-inch wafer manufacturing. Now over 40 years later, things have flipped and this site is the leader in the United States for advanced packaging,” explains Katie Prouty, manager of Intel’s Fab 9 advanced packaging facility in New Mexico.
To meet the massive demands of AI, Intel is pushing the boundaries of what’s physically possible. Intel Foundry is building up with Foveros stacking, and across with EMIB interconnects.
“Some of the customers are coming to us first for advanced packaging,” Prouty says. “When we’re successful delivering to those customers, they’ll continue to grow their trust and faith in Intel as a foundry.”
What started in Rio Rancho, New Mexico as 25 employees in 1980, has now proudly grown to 2,700 employees and 500 suppliers bringing critical U.S. advanced packaging technology to market.