Catalog of SIP Cores
System on Chip design resources
System on Chip design resources
August 24, 2026 -
By Alex Carter, intelligentliving.co
Alibaba’s XuanTie C950, a 64-core RISC-V processor built on TSMC’s 5nm process, just demonstrated something no chip using the open-source instruction set has ever done before: it ran a 27-billion-parameter language model entirely on the CPU, with no GPU, no emulation layer, and no translation overhead. The implications stretch far beyond a single benchmark result, touching on China’s semiconductor sovereignty strategy, the future of the RISC-V architecture, and how the Alibaba RISC-V chip stack could reshape AI deployment.
The Qwen 3.8 27B model, released under an open-source license on August 14, 2026, achieved 30 tokens per second on the C950 with a time-to-first-token of 1.9 seconds. For context, running a 27-billion-parameter model conventionally requires 16 to 24 gigabytes of dedicated GPU memory. The C950 completes the same inference task using its CPU cores and integrated AI acceleration engines alone.