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Silicon-Proven PCIe Gen 5 IP Core Accelerates the Future of High-Performance SoC Connectivity

August 31, 2026 -

Production-ready PCIe Gen 5 IP Core delivers up to 32 Gbps per lane with integrated PCS and PMA, enabling faster and lower-risk SoC integration

T2M, a global semiconductor IP Cores provider and ASIC solutions company, today announced the availability of its partner’s silicon-proven PCI Express (PCIe) Gen 5 IP Core in 12FFC technology, further expanding its portfolio of production-ready high-speed Interface IP Cores.

The PCIe Gen 5 IP Core has been validated in silicon and deployed in production chips, providing semiconductor companies with a proven solution for integrating high-performance PCIe connectivity into next-generation SoCs. Supporting data rates from 2.5 Gbps through 32 Gbps per lane, the IP Core addresses the growing bandwidth requirements of AI, data center, networking, storage, automotive and high-performance computing applications.

Key Technical Highlights

  • PCIe Gen 1.0 through Gen 5.0 support for broad backward compatibility
  • Up to 32 Gbps per lane PCIe Gen 5 operation
  • 2.5 Gbps to 32 Gbps scalable data-rate support
  • 4 channels per Quad for flexible multi-lane configurations
  • Integrated PCS and PMA layers for streamlined SoC implementation
  • Silicon-proven in 12FFC
  • Deployed in production chips, reducing adoption and implementation risk

The integrated PCS and PMA architecture provides designers with a highly optimized implementation for high-speed PCIe connectivity. By combining the key physical-layer functions within a proven IP Core platform, the solution helps simplify integration, shorten development schedules and reduce the engineering effort required to bring PCIe Gen 5-enabled SoCs to production.

Supporting multiple PCIe generations within a common architecture also gives customers greater flexibility when designing SoCs for different performance and system requirements. Compatibility from PCIe Gen 1 through Gen 5 enables designs to support established PCIe ecosystems while providing a migration path to 32 Gbps PCIe Gen 5 performance.

Production-Proven IP for Faster SoC Development

As PCIe bandwidth requirements continue to increase across AI accelerators, processors, networking devices, storage controllers and other high-performance SoCs, semiconductor companies require more than specification-compliant IP cores. Proven silicon implementation and production deployment are increasingly important for reducing integration risk and accelerating time-to-market.

This PCIe Gen 5 IP Core meets these requirements with a production-proven architecture that combines high-speed performance, backward compatibility, and integration flexibility.

Our PCIe Gen 5 IP Core is silicon-proven in 12FFC and is already deployed in production chips, giving customers a mature platform to accelerate PCIe-enabled SoC development while minimising implementation risk.

The PCIe Gen 5 IP Core complements T2M’s growing portfolio of high-speed interface technologies, enabling customers to access proven IP Cores and engineering support for advanced semiconductor designs.

Availability

The PCIe Gen 5 IP Core in 12FFC is available for immediate customer licensing and evaluation. T2M provides support to assist customers throughout IP Core evaluation, SoC integration, implementation and production.

For datasheets, technical specifications, evaluation and licensing inquiries, please drop a request contact@t-2-m.com

About: T2M is a global independent semiconductor technology expert, supplying complex semiconductor IP Cores, Software, KGD, and disruptive technologies enabling accelerated development of your Wearables, IOT, Communications, Storage, Servers, Networking, TV, STB, and Satellite SoCs.