Synopsys Custom Design Platform Secures Full-flow Displacement of Legacy Design Tools at Alphawave
Alphawave Adopts Synopsys Solution to Accelerate Design of High-speed Connectivity IP
MOUNTAIN VIEW, Calif., March 10, 2020 -- Synopsys, Inc. (Nasdaq: SNPS) today announced that silicon IP provider Alphawave has adopted the Synopsys Custom Design Platform to accelerate the design of multi-standard connectivity solutions. Alphawave chose Synopsys to replace its legacy design system based on superior overall design productivity.
As part of the flow migration, the companies collaborated to build a customized regression system that automatically generates simulation jobs, compares results with previous runs, and reports failures. Alphawave also deployed Synopsys' Custom Compiler™ Quick Start Kits to optimize the productivity of its layout team with process-specific flows and tool settings.
"Synopsys gave us a superior solution for advanced node custom design, which helped us meet aggressive power, performance and area targets for our high-speed connectivity IP," said Tony Pialis, Alphawave founder and CEO. "Through close collaboration, we were able to complete our first tapeout with the Synopsys solution within three months of deploying it."
The Synopsys Custom Design Platform is based on the Custom Compiler design and layout environment and includes HSPICE® circuit simulator, FineSim® circuit simulator, and CustomSim™ FastSPICE circuit simulator, Custom WaveView™ waveform display, StarRC™ parasitic extraction, and IC Validator physical verification.
"Leading-edge custom design teams, such as Alphawave, are looking for an alternative to the outdated design solutions of the past," said Aveek Sarkar, vice president of engineering at Synopsys. "The Synopsys Custom Design Platform is a proven solution that delivers better designer productivity and has been adopted by thousands of designers worldwide across a broad range of mature and advanced node process technologies."
Key features of the Custom Design Platform include reliability-aware verification, Fusion Technology for extraction and visually assisted layout. Reliability-aware verification ensures robust analog/mixed-signal (AMS) design with signoff-accurate transistor-level EM/IR analysis, large-scale Monte Carlo simulation, aging analysis, and other verification checks. Fusion Technology for extraction with StarRC parasitic extraction reduces design closure time by enabling accurate parasitic simulation before layout is complete. Visually assisted automation is a pioneering approach to reducing layout effort that is proven to deliver higher productivity.
For more on the Synopsys Custom Design Platform, visit https://www.synopsys.com/custom
About Synopsys
Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software security and quality solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest security and quality, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at www.synopsys.com.
|
Synopsys, Inc. Hot IP
Synopsys, Inc. Hot Verification IP
Related News
- Cadence Digital and Signoff Full Flow and Custom/Analog Tools Certified for TSMC N6 and N5/N5P Process Technologies
- Cadence Full-Flow Digital and Signoff Tools and Custom/Analog Tools Certified and Enabled for Intel 22FFL Process Technology
- Cadence Custom/Analog and Full-Flow Digital and Signoff Tools Enabled for GLOBALFOUNDRIES 7LP Process Node
- Sondrel Selects Synopsys Fusion Design and Verification Platforms to Displace Legacy Design Tools
- Synopsys and Arm Extend Strategic Partnership to Deliver Superior Full-Flow Quality-of-Results and Time-to-Results
Breaking News
- eInfochips Wins Design Services Company of the Year Award from IESA
- Samsung Foundry Certifies Analog FastSPICE Platform from Siemens for Early Design Starts on 3nm GAA Process Technology
- Silvaco Acquires Physical Verification Solution Provider POLYTEDA CLOUD LLC
- Arasan announces its Total eMMC IP solution for TSMC 22nm process
- MediaTek Launches 6nm Dimensity 1200 Flagship 5G SoC with Unrivaled AI and Multimedia for Powerful 5G Experiences
Most Popular
- Cadence to Acquire NUMECA to Expand System Analysis Capabilities with Computational Fluid Dynamics
- Arasan announces its Total eMMC IP solution for TSMC 22nm process
- Dual Mode Bluetooth v5.2 SW Link Layer, Protocol Stack SW, Profiles licensed for ultra-low power 22nm True Wireless (TWS) Earbuds SoC
- Industry R&D Spending To Rise 4% After Hitting Record in 2020
- Silvaco Acquires Physical Verification Solution Provider POLYTEDA CLOUD LLC
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |