Catalog of SIP Cores
System on Chip design resources
System on Chip design resources
July 27, 2026 -
Sunnyvale, California -- True Circuits, Inc. (TCI), a leading provider of analog and mixed-signal intellectual property (IP) and developer of computer aided design (CAD) software announced today its intention to donate the JSPICE Design Environment (JDE) to form the foundation of a modern AMS development environment that unifies design generation, simulation, measurement, characterization, data analysis, and AI-assisted engineering into a single extensible environment. JDE defines an open, common set of design, measurement and analysis languages and a common data model for waveform data coming from a simulator. This all enables process-independent designs and simulator-decoupled measurement and analysis scripts that are highly reusable.
Following on announcements of JDE availability through a beta program over the last two years, TCI sees the immense value of putting JDE in the hands of the open source analog design community so users, content creators and service providers can freely use and contribute to this powerful design environment. The goal is to create a vibrant JDE ecosystem where work and ideas can be shared, problems solved and innovation unleashed to dramatically improve design quality and reduce design time. Over the coming months, further announcements will be made about ecosystem access and JDE software availability.
The Case for JDE™
Digital design has become highly driven by software standards and abstraction. It has achieved impressive productivity gains and is poised to benefit from the use of AI. Analog and mixed-signal (AMS) design has not. Much of AMS design remains tied to schematics, fragile scripts, manual analysis, and knowledge that exists primarily in the heads of a few experienced engineers. With JDE, analog designers can be at least 10X more productive. Adding AI and building a community may increase that to 100X or more.
JDE replaces a company or designer-specific flow that is saddled with multiple data formats and ad hoc scripts with open engineering languages, APIs and shared data models that are easy to use and reuse. Much like digital verification, JDE has several layers of abstraction for measurement and analysis, and complete characterization frameworks.
JDE enables users to run massively parallel, mixed mode simulations, either locally or in the cloud, or both with unlimited simulator licenses. JDE supports SPICE, Verilog and Verilog-A. It does directed logic synthesis and includes sophisticated Statistical Timing Analysis (STA) that uses SPICE data for each subcircuit. A preprocessor compiles an expressive netlist generation language supporting process node parameterization, conditional generation, reusable libraries and programmable circuit generation. JDE is designed to support multiple commercial and open-source simulators through common interfaces.
Legacy and Giving Back
Analog design automation has been the backbone and hallmark of True Circuits since its founding in 1998. This was a passion of its principal author, Dr. John G. Maneatis, who dedicated his illustrious career in the semiconductor industry to the idea that analog design should be as predictable and verifiable as digital design. He believed from the beginning, that what could be automated, should be automated, that doing the same thing over and over was a waste of a talented engineer’s time. John understood that once engineering knowledge is expressed algorithmically, it can be shared, reused, improved, verified and eventually understood by AI. While John is best known for his definitive work in PLL design, his gift was this design philosophy that turned TCI’s innovative circuit designs into some of the most standardized, full-featured and widely used IP in the semiconductor industry.
“Opening JDE to the semiconductor community is our way of sharing John’s gift with the fellow engineers he so loved collaborating with and supporting over the years, said Stephen G. Maneatis, True Circuits’ Chief Executive Officer. “Knowing other designers can freely explore, automate and innovate is a lasting legacy to John and his life-long effort to keep analog design alive and inspire the next generation of dreamers and doers.”
About the JDE™ Ecosystem
The JDE open ecosystem allows engineering knowledge, not just software, to be shared. Characterization packages, measurement libraries, generators, verification suites, and AI agents can all build on common languages and shared data models. It will be easily accessible by a variety of users, from universities and businesses to individual designers, all providing content and services to make JDE the development environment of the future. The future of semiconductors lies with universities that attract and train engineering talent, and JDE is positioned to be their design environment of choice.
For more information about JDE, visit www.truecircuits.com/jspice.html.
For discussion about JDE and how to get started, contact Brian Gardner, V.P. of Business Development, True Circuits, Inc., bgardner@truecricuits.com.
About True Circuits
True Circuits develops and markets a broad range of industry leading PLLs, DLLs and DDR PHY hard macros for ICs for the semiconductor, systems and electronics industries. TCI's robust state-of-the-art circuits, methodical and proven design strategy, and close association with the world's leading foundries, IDMs, and design services companies allow the company to quickly and reliably create new and innovative designs in a variety of advanced process technologies. Over the last 28 years, True Circuits has distinguished itself as a technology leader in the timing IP space, and its PLLs and DLLs are used extensively around the world in its customers' products with production volumes well into the billions.
True Circuits is headquartered at 333 W. El Camino Real, Suite 220, Sunnyvale, California 94087 and can be found on the web at www.truecircuits.com. Product inquiries can be made by calling the company directly at (650) 949-3400 or via e-mail at sales@truecircuits.com.
Acronyms and definitions:
ASIC Application Specific IC IC Integrated Circuit
DLL Delay-Locked Loop IP Intellectual Property
DDR Double Data Rate PLL Phase-Locked Loop