The portfolio enables users to access, observe, and control processor development in real-time, accelerating silicon time-to-market
SAN MATEO, Calif., Mar. 17, 2020 – SiFive, Inc., the leading provider of commercial RISC-V processor IP and silicon solutions, today announced SiFive Insight, a technology portfolio that enables faster silicon bring-up, software/hardware integration, and application development through hardware trace and debug. SiFive Insight is the industry’s first combined trace and debug solution for the freely-available, open-specification RISC-V ISA.
Access, Observe, and Control
SiFive Insight combines trace and debug capabilities to offer a comprehensive portfolio that enables faster and easier product development. SiFive has invested heavily in SiFive Insight’s trace capabilities to meet customer demand and expectations for the capability to access, observe, and control products deploying SiFive’s RISC-V Core IP portfolio.
SiFive Insight includes many open-source contributions to develop the growing ecosystem of RISC-V developers, including a C++ cross-platform Nexus 5001™ trace decoder for RISC-V. The Nexus 5001™ trace specification is an open, well-documented standard that includes an extensive portfolio of processor trace and trace related features. The SiFive Insight trace implementation is compliant with the proposed RISC-V Nexus Trace Working Group specification, currently under consideration.
SiFive Insight is available for all SiFive RISC-V Core IP product lines offered by SiFive Core Designer, the award-winning(1) cloud-based tool to define and customize RISC-V processor cores.
Popular toolsets from the leading application and embedded processor software development companies also support SiFive Insight, simplifying the adoption of SiFive processor IP and RISC-V application development.
”The fast-paced growth of the RISC-V ecosystem requires robust tools and solutions to speed up new product development,” says Anders Holmberg, Chief Strategy Officer, IAR Systems. “IAR Systems leading software tools support the comprehensive trace and debug solution SiFive Insight, enabling boosted application performance and shortened time to market for companies choosing RISC-V for their next innovation.”
"Lauterbach sees RISC-V as an important contributor to the expanding domain of Smart Devices," said Stephan Lauterbach, CTO of Lauterbach Development Tools. "Our TRACE32 debug and trace tools fully support SiFive Insight, providing developers with world-leading tools that seamlessly integrate into the rapidly-growing RISC-V ecosystem."
“All of our products are fully compatible with SiFive’s RISC-V cores,” says Rolf Segger, founder of SEGGER. “With SiFive Insight, SiFive now offers valuable additional debug and trace capabilities. At SEGGER, we are making sure these great new features can be fully leveraged using our industry-leading J-Link debug probe and Ozone debugger.“
With RISC-V adoption increasing in many markets such as automotive, networking, enterprise, mission-critical, and IoT, the ability to swiftly create reliable systems is critical. SiFive’s use of open ISA’s, software and standards ensure quality through trust-but-verify processes.
“Our mission is to enable higher-quality products with fast time to market, especially in the fast-growing Intelligence of Things and TinyML markets,” said Dr. Naveed Sherwani, President, and CEO of SiFive. “SiFive Insight enables our customers to continue to develop RISC-V based applications without changing workflows, and new designers to simply and easily adopt the exciting new technology. This will drive the rapid creation of new domain-specific accelerators and embedded devices with on-device decision-making capabilities.”
For more information on SiFive Insight, please visit SiFive.com/SiFive-Insight and read the SiFive Insight launch blog.
SiFive is on a mission to free semiconductor roadmaps and declare silicon independence from the constraints of legacy ISAs and fragmented solutions. As the leading provider of market-ready processor core IP and silicon solutions based on the free and open RISC-V instruction set architecture, SiFive helps SoC designers reduce time-to-market and realize cost savings with customized, open-architecture processor cores, and democratizes access to optimized silicon by enabling system designers in all markets to build customized RISC-V based semiconductors. Founded by the inventors of RISC-V, SiFive has 16 design centers worldwide and backing from Sutter Hill Ventures, Qualcomm Ventures, Spark Capital, Osage University Partners, Chengwei, Huami, SK Hynix, Intel Capital, and Western Digital. For more information, please visit www.sifive.com.
(1) – SiFive Core Designer won Design Tool and Development Software category at the Elektra Awards, 2019.