By Sally Ward-Foxton, EETimes (August 26, 2021)
Is entirely autonomous chip design possible? Can AI behave as an “artificial architect,” designing and optimizing entire chips?
This is the question Synopsys CEO Aart de Geus set out to answer in his keynote presentation at Hot Chips. The answer is a resounding “yes”.
Synopsys has long been working on using AI in its EDA tools (according to De Geus, all Synopsys tools today use AI in one form or another). Its flagship AI-powered tool, DSO.ai, launched last year. DSO tackles all the tasks in the geometry of chip design, that is, all the physical aspects of the design, in contrast to some other AI-based tools which tackle bits of this task only. DSO is named for design space optimization, Synopsys’ vision of the next step in today’s design space exploration process.
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