Complete UFS 3.1 Controller solution (Analog / Digital IP Cores) licensed to China's leading Smartphone Company

20^th June 2022. – T2M^IP, the global independent semiconductor IP Cores provider & Technology experts, is pleased to announce the licensing of its partner’s JEDEC compliant and Silicon proven Total UFS Solution with the UFS v3.1 Host Controller IP Cores, MIPI M-PHY v4.1 IP Cores and the MIPI UniPro v1.8 IP Cores to a Tier-1 Chinese Company for their UFS Device application to maximize processing speed of high-density flash data storage.

The Complete UFS 3 Solution comes as a packaged bundle with total UFS Device functionality which includes M-PHY, Unipro, and UFS Controller IP Cores along with smaller blocks integrated together making for a complex yet a highly modular design. These smaller blocks include F-PHY, Voltage Regulator, Voltage Detector, Oscillator, Thermal Sensor, Noise Generator, GPIO and Power Switch helps to maintain and also performs interface management and power management /control processes which simplifies its implementation and integration into the chip.

The most important part of the solution, UFS v3.1 Host Controller IP Cores is a UFS synchronous serial interface designed for use in applications where power consumption needs to be curtailed, with its most basic usage, being to help communicate between host processor and mass storage devices like flash and other non-volatile memories. This communication is achieved via UFS Device, using MIPI UniPro as Link and MPHY for PHY layers. The UFS follows the common methods used for specifying the location of blocks of data stored on computer storage devices with the help of TAG overlap/LBA overlap. Its structured and synchronous design allows for a full range of UPIU packets Data In & Data Out.

MIPI M-PHY and MIPI Unipro Controller IP Cores were licensed as an integral part of the total UFS solution for a lossless and high-density Flash storage. The MIPI M-PHY v4.1 IP Cores is a serial interface technology with high bandwidth capabilities and supports HS Gear4 rates up to 11.6Gbps, which is particularly developed for mobile applications to obtain low pin count combined with very good power efficiency. The MIPI Unipro v1.8 Controller IP Cores provides the capability to control the UniPro link over a MIPI M-PHY link. It is a high-performance, chip-to-chip, serial interconnect bus for mobile applications boasting a Maximum R/W Performance up to 2170MB/s.

The UFS Host Controller IP cores along with the MIPI M-PHY IP Cores and MIPI UniPro Controller IP Cores have also been used in semiconductor industry’s Enterprise Computing, Storage area networks, Wireless and mobile devices, IoT, Embedded systems and other Consumer Electronics…

In addition to UFS, M-PHY and Unipro IP Cores, T2M ‘s broad silicon Interface IP Core Portfolio includes USB, HDMI, Display Port, DDR, MIPI (CSI, DSI, Soundwire, I3C), PCIe, 10/100/1000 Ethernet, V by One, programmable SerDes, SD/eMMCs and many more, available in major Fabs in process geometries as small as 7nm. They can also be ported to other foundries and leading-edge processes nodes on request.

Availability: These Semiconductor Interface IP Cores are available for immediate licensing either stand alone or with pre-integrated Controllers and PHYs. For more information on licensing options and pricing please drop a request / MailTo

About T2M: T2M^IP is the global independent semiconductor technology experts, supplying complex semiconductor IP Cores, Software, KGD and disruptive technologies enabling accelerated development of your Wearables, IOT, Communications, Storage, Servers, Networking, TV, STB and Satellite SoCs. For more information, please visit: www.t-2-m.com

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