eMemory's Security-Enhanced OTP Qualifies on TSMC N5A Process Specializing in High-Performance Automotive Chips
Hsinchu Taiwan -- July 3, 2024 -- eMemory’s security-enhanced version of NeoFuse OTP has qualified for the TSMC N5A platform - an enhanced process for automotive applications. With the rising demands for autonomous driving and electric vehicles, automotive chips must possess high-computing capabilities while adhering to strict safety standards. The N5A technology brings the same technology used in supercomputers today to vehicles, packing the performance, power efficiency, and logic density of N5 while meeting the stringent quality and reliability requirements of automotive safety and quality standards.
NeoFuse OTP on the TSMC N5A process features the versatility to support applications requiring either high performance or low power consumption, along with the added benefit of heightened security. The security-enhanced OTP macro includes eMemory’s proprietary physical unclonable function (PUF) to anchor the IC’s root of trust into the silicon. The memory array is designed with wide bandwidth output, allowing customers to utilize additional IO for the ECC function, which further boosts reliability for auto applications. The IP also boasts complete design simulation, including Electromigration/Aging, and adheres to additional design rules for the N5A process. At the operational level, the temperature tolerance extends up to 150°C, and the wide voltage range offers greater flexibility to meet diverse automotive application requirements and stringent standards. As a long-standing market-leading advantage, eMemory’s OTP does not require extra masks on the N5A process, thus significantly reducing costs.
"Nowadays, consumers’ high expectations for driving experiences have resulted in a significant increase of electronics presented in a car, whether for self-driving, upgraded infotainment, or EVs. Many ICs need high-performance computing with maximum security to meet these requirements. eMemory’s NeoFuse OTP on the N5A process addresses such demands while meeting safety standards, such as AEC Q-100. We are happy to note that there are customers waiting for our solutions. Moving forward, we will continue to provide reliable IPs with exceptional services to the ever-revolutionizing industry," said Chris Lu, Senior Vice President of Business Development of eMemory.
“TSMC works closely with our Open Innovation Platform® (OIP) ecosystem partners to satisfy the growing demand for computing power in newer and more intensive automotive applications such as AI-enabled driver assistance,” said Dan Kochpatcharin, Head of the Ecosystem and Alliance Management Division at TSMC. “Our latest collaboration with eMemory enables designers to achieve the unprecedented levels of power efficiency and performance for the next-generation automotive applications with proven solutions using TSMC’s most advanced technologies.”
On top of AI, mobile, and cloud servers, eMemory remains dedicated to providing reliable and high-quality IP solutions for the next generation of automotive computing.
|
Related News
- eMemory's Security-Enhanced OTP Qualifies on TSMC N4P Process, Pushing Forward in High-Performance Leading Technology
- eMemory's Security-enhanced OTP Qualifies on TSMC N5 Process and Continues to Tackle Automotive Solutions
- eMemory's Security-Enhanced OTP IP Qualified on TSMC N6 Process
- Synopsys Accelerates High-Performance Computing SoC Designs with Industry's Broadest IP Portfolio for TSMC's 5nm Process Technology
- Aplus Flash Technology announces availability of 0.35um embedded OTP EPROM IP with maximum performance: aplus' 0.35um embedded OTP IP offers high-performance , low-voltage operation on SMIC's 0.35um 2P3M OTP EPROM process
Breaking News
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Most Popular
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Siemens collaborates with TSMC to drive further innovation in semiconductor design and integration
- Aion Silicon Joins Intel Foundry Accelerator Design Services Alliance to Deliver Next-Generation Custom SoCs at Scale
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |