SoCs Get a Helping Hand from AI Platform FlexGen

By Gary Hilson, EETimes | March 21, 2025

FlexGen, a network-on-chip (NoC) interconnect IP, is aiming to accelerate SoC creation by leveraging AI.

Developed by Arteris Inc., FlexGen promises to deliver a 10× productivity boost while reducing design iterations and the time required to develop. In a briefing with EE Times, Arteris CMO Michal Siwinski said FlexGen achieves up to a 30% reduction in wire length to lower power use, as well as up to 10% reduction in latency that results in improved performance in SoC and chiplet designs.

“It will actually do the process of generating that network on chip, generating that interconnect and it will actually generate however many interconnects are required to meet the requirement,” Siwinski said.

Using AI and machine learning for chip design isn’t new, Siwinski said, but often the productivity boosts come at the cost of performance or power. FlexGen is able to reduce the number of elements on the critical path of a project, while also improving power/performance metrics, which he said is unique.

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