Blogs
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Synopsys and Intel Team Up on the First UCIe-Connected Chiplet-Based Test Chip
(Friday, December 15, 2023)
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Towards Processing In-Memory
(Thursday, December 14, 2023)
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DisplayPort 2.1 vs DisplayPort 1.4: A Detailed Comparison of Key Features
(Thursday, December 14, 2023)
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Statistical Profile Extension: extracting value from SPE for SoC Telemetry
(Monday, December 11, 2023)
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The Importance of Memory Architecture for AI SoCs
(Monday, December 11, 2023)
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Masking-friendly signatures and the design of Raccoon
(Monday, December 11, 2023)
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Building Verification Infrastructure for Complex PCIe Verification
(Thursday, December 7, 2023)
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The Evolution of Generative AI up to the Model-Driven Era
(Thursday, December 7, 2023)
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Rambus Expands Quantum Safe Solutions with Quantum Safe Engine IP
(Thursday, December 7, 2023)
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Rambus Expands Quantum Safe Solutions with Quantum Safe Engine IP
(Tuesday, December 5, 2023)
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Three Smart Steps to Quickly Test a Register Map for Your Entire SoC
(Monday, December 4, 2023)
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5G Based LEO satellites will Truly Grow IoT Adoption Worldwide
(Monday, December 4, 2023)
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RISC-V to the Core: New Horizons
(Monday, December 4, 2023)
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The Ubiquitous USB 2.0: Exploring Its Benefits and Widespread Adoption
(Friday, December 1, 2023)
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Customization? Yes! After tape-out? Yes!
(Thursday, November 30, 2023)
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Pace of Innovation for Custom Silicon on Arm Continues with AWS Graviton4
(Thursday, November 30, 2023)
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Navigating Cache Coherence: The Back-Invalidate Feature in CXL 3.0
(Thursday, November 30, 2023)
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Reducing design cycle time for semiconductor startups: The path from MVP to commercial viability
(Wednesday, November 29, 2023)
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Unlocking the Power of NAND ONFI Controller IP
(Wednesday, November 29, 2023)
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Meet Synopsys.ai Copilot, Industry's First GenAI Capability for Chip Design
(Tuesday, November 28, 2023)
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Revolutionize System Verification Flow with a Holistic Approach
(Thursday, November 23, 2023)
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Take your neural networks to the next level with Arm's Machine Learning Inference Advisor
(Thursday, November 23, 2023)
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Wi-Fi 7 (IEEE 802.11be) & MLO vs. Wi-Fi 6/6E (IEEE 802.11ax): What to Ask for Optimal Design Considerations
(Thursday, November 23, 2023)
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Ethernet Encryption: Harnessing the Power of IPSec Shields
(Thursday, November 23, 2023)
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Running X-Propagation with Low-Power Simulation
(Thursday, November 23, 2023)
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Introducing Cortex-M52: Bringing Arm's AI-optimized Helium architecture to the smallest IoT devices
(Thursday, November 23, 2023)
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RISC-V | Solving bus and software deadlock problems in complex SoCs
(Thursday, November 23, 2023)
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5 ways to achieve the right level of customization
(Wednesday, November 22, 2023)
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How Photonics Can Light the Way for Higher Performing Multi-Die Systems
(Wednesday, November 22, 2023)
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Leveraging AI to Optimize the Debug Productivity and Verification Throughput
(Monday, November 20, 2023)
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How to Get Started with Model-Based Systems Engineering
(Monday, November 20, 2023)
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Unlock the Possibilities with HiFive Unmatched RISC-V Development Boards
(Monday, November 20, 2023)
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Synopsys CXL Protocol Verification Solutions Proven with Real World Vendor Devices at the CXL Compliance Test Event
(Friday, November 17, 2023)
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Insights Into the Evolutions and Optimizations of PCIe 6.0
(Friday, November 17, 2023)
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How Innosilicon makes Fantasy a reality
(Thursday, November 16, 2023)
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Synopsys Cloud: The Power of Automated License Management
(Thursday, November 16, 2023)
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How Will Angstrom-Scale Chips Advance the Electronics Industry?
(Thursday, November 16, 2023)
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Enhance Reliability and Predict Failures in Automotive Electronics
(Thursday, November 16, 2023)
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CXL 3.1: What's Next for CXL-based Memory in the Data Center
(Wednesday, November 15, 2023)
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The Advancements of DDR5: How it Stacks Up Against DDR4
(Tuesday, November 14, 2023)
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Breakthrough in area efficiency of on-chip ESD protection
(Monday, November 13, 2023)
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RISC-V Summit US 2023: CHERI in full bloom!
(Friday, November 10, 2023)
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UCIe Interoperability Between Intel and Cadence
(Thursday, November 9, 2023)
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IMG DXD: A New Horizon for Cloud Gaming
(Wednesday, November 8, 2023)
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EDA in the Cloud: Astera Labs, AWS, Arm, and Cadence Report
(Wednesday, November 8, 2023)
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Arm-based Cloud Instances Outperform x86 Instances by up to 64% on VP9 Encoding
(Tuesday, November 7, 2023)
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NAND vs. NOR Flash Memory: Unpacking the Battle of Non-Volatile Memory
(Tuesday, November 7, 2023)
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USB4 Version 2.0 - Link Configurations
(Monday, November 6, 2023)
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How Will EDA Benefit from the AI Revolution? - Part 2
(Monday, November 6, 2023)
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When Attempts To Establish IP Empires Died
(Monday, November 6, 2023)
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