Blogs
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Pace of Innovation for Custom Silicon on Arm Continues with AWS Graviton4
(Thursday, November 30, 2023)
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Navigating Cache Coherence: The Back-Invalidate Feature in CXL 3.0
(Thursday, November 30, 2023)
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Reducing design cycle time for semiconductor startups: The path from MVP to commercial viability
(Wednesday, November 29, 2023)
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Unlocking the Power of NAND ONFI Controller IP
(Wednesday, November 29, 2023)
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Meet Synopsys.ai Copilot, Industry's First GenAI Capability for Chip Design
(Tuesday, November 28, 2023)
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Revolutionize System Verification Flow with a Holistic Approach
(Thursday, November 23, 2023)
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Take your neural networks to the next level with Arm's Machine Learning Inference Advisor
(Thursday, November 23, 2023)
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Wi-Fi 7 (IEEE 802.11be) & MLO vs. Wi-Fi 6/6E (IEEE 802.11ax): What to Ask for Optimal Design Considerations
(Thursday, November 23, 2023)
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Ethernet Encryption: Harnessing the Power of IPSec Shields
(Thursday, November 23, 2023)
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Running X-Propagation with Low-Power Simulation
(Thursday, November 23, 2023)
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Introducing Cortex-M52: Bringing Arm's AI-optimized Helium architecture to the smallest IoT devices
(Thursday, November 23, 2023)
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RISC-V | Solving bus and software deadlock problems in complex SoCs
(Thursday, November 23, 2023)
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5 ways to achieve the right level of customization
(Wednesday, November 22, 2023)
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How Photonics Can Light the Way for Higher Performing Multi-Die Systems
(Wednesday, November 22, 2023)
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Leveraging AI to Optimize the Debug Productivity and Verification Throughput
(Monday, November 20, 2023)
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How to Get Started with Model-Based Systems Engineering
(Monday, November 20, 2023)
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Unlock the Possibilities with HiFive Unmatched RISC-V Development Boards
(Monday, November 20, 2023)
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Synopsys CXL Protocol Verification Solutions Proven with Real World Vendor Devices at the CXL Compliance Test Event
(Friday, November 17, 2023)
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Insights Into the Evolutions and Optimizations of PCIe 6.0
(Friday, November 17, 2023)
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How Innosilicon makes Fantasy a reality
(Thursday, November 16, 2023)
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Synopsys Cloud: The Power of Automated License Management
(Thursday, November 16, 2023)
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How Will Angstrom-Scale Chips Advance the Electronics Industry?
(Thursday, November 16, 2023)
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Enhance Reliability and Predict Failures in Automotive Electronics
(Thursday, November 16, 2023)
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CXL 3.1: What's Next for CXL-based Memory in the Data Center
(Wednesday, November 15, 2023)
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The Advancements of DDR5: How it Stacks Up Against DDR4
(Tuesday, November 14, 2023)
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Breakthrough in area efficiency of on-chip ESD protection
(Monday, November 13, 2023)
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RISC-V Summit US 2023: CHERI in full bloom!
(Friday, November 10, 2023)
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UCIe Interoperability Between Intel and Cadence
(Thursday, November 9, 2023)
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IMG DXD: A New Horizon for Cloud Gaming
(Wednesday, November 8, 2023)
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EDA in the Cloud: Astera Labs, AWS, Arm, and Cadence Report
(Wednesday, November 8, 2023)
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Arm-based Cloud Instances Outperform x86 Instances by up to 64% on VP9 Encoding
(Tuesday, November 7, 2023)
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NAND vs. NOR Flash Memory: Unpacking the Battle of Non-Volatile Memory
(Tuesday, November 7, 2023)
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USB4 Version 2.0 - Link Configurations
(Monday, November 6, 2023)
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How Will EDA Benefit from the AI Revolution? - Part 2
(Monday, November 6, 2023)
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When Attempts To Establish IP Empires Died
(Monday, November 6, 2023)
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Showcasing AI-Driven Analog Design Migration at Samsung SAFE Forum
(Monday, November 6, 2023)
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Fine-grained memory protection
(Thursday, November 2, 2023)
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Pioneering Seamless Interoperability on Cloud Across the Semiconductor Design Ecosystem
(Thursday, November 2, 2023)
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Everything You Need to Know About RISC-V
(Thursday, November 2, 2023)
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Debugging RISC-V processors using E-Trace
(Wednesday, November 1, 2023)
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Synopsys CXL Protocol Verification Solutions Proven with Real World Vendor Devices at the CXL Compliance Test Event (CTE 002)
(Monday, October 30, 2023)
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USB4 Version 2.0 - Gen4 High-Speed Lane Initialization and Training
(Monday, October 30, 2023)
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The Road Ahead
(Monday, October 30, 2023)
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Efficiently Packing Neural Network AI Model for the Edge
(Monday, October 30, 2023)
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Bringing Power Efficiency to TinyML, ML-DSP and Deep Learning Workloads
(Monday, October 30, 2023)
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How Will EDA Benefit from the AI Revolution?
(Thursday, October 26, 2023)
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Different approach to implementing multi-monitor - single scoreboard than using the macro `uvm__analysis_imp_decl
(Thursday, October 26, 2023)
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Addressing memory safety with software
(Thursday, October 26, 2023)
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Rambus HBM3 Controller IP Gives AI Training a New Boost
(Thursday, October 26, 2023)
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Rambus HBM3 Controller IP Gives AI Training a New Boost
(Wednesday, October 25, 2023)
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