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Blogs
Running X-Propagation with Low-Power Simulation
(Thursday, November 23, 2023)
Introducing Cortex-M52: Bringing Arm's AI-optimized Helium architecture to the smallest IoT devices
(Thursday, November 23, 2023)
RISC-V | Solving bus and software deadlock problems in complex SoCs
(Thursday, November 23, 2023)
5 ways to achieve the right level of customization
(Wednesday, November 22, 2023)
How Photonics Can Light the Way for Higher Performing Multi-Die Systems
(Wednesday, November 22, 2023)
Leveraging AI to Optimize the Debug Productivity and Verification Throughput
(Monday, November 20, 2023)
How to Get Started with Model-Based Systems Engineering
(Monday, November 20, 2023)
Unlock the Possibilities with HiFive Unmatched RISC-V Development Boards
(Monday, November 20, 2023)
Synopsys CXL Protocol Verification Solutions Proven with Real World Vendor Devices at the CXL Compliance Test Event
(Friday, November 17, 2023)
Insights Into the Evolutions and Optimizations of PCIe 6.0
(Friday, November 17, 2023)
How Innosilicon makes Fantasy a reality
(Thursday, November 16, 2023)
Synopsys Cloud: The Power of Automated License Management
(Thursday, November 16, 2023)
How Will Angstrom-Scale Chips Advance the Electronics Industry?
(Thursday, November 16, 2023)
Enhance Reliability and Predict Failures in Automotive Electronics
(Thursday, November 16, 2023)
CXL 3.1: What's Next for CXL-based Memory in the Data Center
(Wednesday, November 15, 2023)
The Advancements of DDR5: How it Stacks Up Against DDR4
(Tuesday, November 14, 2023)
Breakthrough in area efficiency of on-chip ESD protection
(Monday, November 13, 2023)
RISC-V Summit US 2023: CHERI in full bloom!
(Friday, November 10, 2023)
UCIe Interoperability Between Intel and Cadence
(Thursday, November 9, 2023)
IMG DXD: A New Horizon for Cloud Gaming
(Wednesday, November 8, 2023)
EDA in the Cloud: Astera Labs, AWS, Arm, and Cadence Report
(Wednesday, November 8, 2023)
Arm-based Cloud Instances Outperform x86 Instances by up to 64% on VP9 Encoding
(Tuesday, November 7, 2023)
NAND vs. NOR Flash Memory: Unpacking the Battle of Non-Volatile Memory
(Tuesday, November 7, 2023)
USB4 Version 2.0 - Link Configurations
(Monday, November 6, 2023)
How Will EDA Benefit from the AI Revolution? - Part 2
(Monday, November 6, 2023)
When Attempts To Establish IP Empires Died
(Monday, November 6, 2023)
Showcasing AI-Driven Analog Design Migration at Samsung SAFE Forum
(Monday, November 6, 2023)
Fine-grained memory protection
(Thursday, November 2, 2023)
Pioneering Seamless Interoperability on Cloud Across the Semiconductor Design Ecosystem
(Thursday, November 2, 2023)
Everything You Need to Know About RISC-V
(Thursday, November 2, 2023)
Debugging RISC-V processors using E-Trace
(Wednesday, November 1, 2023)
Synopsys CXL Protocol Verification Solutions Proven with Real World Vendor Devices at the CXL Compliance Test Event (CTE 002)
(Monday, October 30, 2023)
USB4 Version 2.0 - Gen4 High-Speed Lane Initialization and Training
(Monday, October 30, 2023)
The Road Ahead
(Monday, October 30, 2023)
Efficiently Packing Neural Network AI Model for the Edge
(Monday, October 30, 2023)
Bringing Power Efficiency to TinyML, ML-DSP and Deep Learning Workloads
(Monday, October 30, 2023)
How Will EDA Benefit from the AI Revolution?
(Thursday, October 26, 2023)
Different approach to implementing multi-monitor - single scoreboard than using the macro `uvm__analysis_imp_decl
(Thursday, October 26, 2023)
Addressing memory safety with software
(Thursday, October 26, 2023)
Rambus HBM3 Controller IP Gives AI Training a New Boost
(Thursday, October 26, 2023)
Rambus HBM3 Controller IP Gives AI Training a New Boost
(Wednesday, October 25, 2023)
Why eMMC is still a good low-budget storage option?
(Tuesday, October 24, 2023)
Causes of memory unsafety
(Tuesday, October 24, 2023)
Optimizing AI models for Arm Ethos-U NPUs using the NVIDIA TAO Toolkit
(Monday, October 23, 2023)
Utilizing CXL 2.0 IP in the Defense Sector: A Revolution in Secure Computing
(Monday, October 23, 2023)
Buffer bound vulnerabilities and their dangers
(Friday, October 20, 2023)
Neural Network Model quantization on mobile
(Friday, October 20, 2023)
Why You Can't Trust Your NPU Vendor's Benchmarks
(Friday, October 20, 2023)
Rambus Joins Arm Total Design
(Friday, October 20, 2023)
Don't Risk Failure - The Verification Process Begins During Chip Architecture
(Thursday, October 19, 2023)
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