Company
design-reuse.com
D&R China
Blogs
Industry Articles
D&R Events
IP-SoC Days 2026
IP-SoC Days 2025
IP-SoC Days 2024
IP-SoC Days 2023
IP-SoC Days 2022
IP-SoC 2025
IP-SoC 2024
IP-SoC 2023
IP-SoC 2022
Videos
Subscribe to D&R SoC News Alert
English
Mandarin
Login
Catalog of SIP Cores
System on Chip design resources
Catalog of SIP Cores
System on Chip design resources
Menu
Home
Search IP Core
News
Blogs
Articles
D&R Events
Videos
Subscribe to D&R SoC News Alert
Login
News
Center
Foundation IP
Analog IP
Interface IP
Interconnect IP
Memory Controller & PHY
Peripheral Controller
Wireless IP
Wireline IP
Processor IP
RISC-V
AI Core
Automotive IP
Security IP
IoT
Media IP
Avionics / Space IP
Verification IP
Verification Platform
Design Platform
Asic & IP Design Center
IP-SoC Days
IP-SoC Days 2026
IP-SoC Days 2025
IP-SoC Days 2024
IP-SoC Days 2023
IP-SoC Days 2022
IP-SoC 2025
IP-SoC 2024
IP-SoC 2023
IP-SoC 2022
Blogs
Why CAN FD when you can CAN XL?
(Wednesday, October 18, 2023)
RISC-V: An Open Standard - Backed by a Global Community - to Enable Open Computing for All
(Tuesday, October 17, 2023)
Formal verification best practices: sign-off and wrap-up
(Monday, October 16, 2023)
Revolutionizing Electronic Circuit Testing and Debugging Using JTAG
(Monday, October 16, 2023)
Develop Software for the Cortex-M Security Extensions Using Arm DS and Arm GNU Toolchain
(Monday, October 16, 2023)
Concerned about your Memory Subsystem Performance? - Verify confidently with Synopsys DFI Verification IP
(Monday, October 16, 2023)
Journeying Beyond AI: Unleashing the Art of Verification
(Friday, October 13, 2023)
Journeying Beyond AI: Unleashing the Art of Verification
(Friday, October 13, 2023)
CHES Celebrates 25 Years, Names Paper by Intrinsic ID Founders in the Top 3 Most-Cited Papers in the History of the Conference
(Thursday, October 12, 2023)
Elusive IPOs
(Thursday, October 12, 2023)
Are common memory protection mechanisms adequate?
(Thursday, October 12, 2023)
Ensuring the Health and Reliability of Multi-Die Systems
(Thursday, October 12, 2023)
Formal verification best practices: checking data corruption
(Tuesday, October 10, 2023)
Arm A-Profile Architecture Developments 2023
(Monday, October 9, 2023)
Unsafe memory access is ruinous
(Thursday, October 5, 2023)
How Collaboration Will Accelerate Adoption of Multi-Die Systems
(Thursday, October 5, 2023)
Synopsys AMBA Verification IP (VIP) Supports Latest AXI-K Specification from Arm
(Thursday, October 5, 2023)
Formal verification best practices: towards end-to-end properties
(Tuesday, October 3, 2023)
Cadence Generative AI Solution: A Comprehensive Suite for Chip-to-System Design
(Tuesday, October 3, 2023)
Driving Connectivity and Communication Exploring the Synergy of CAN XL and Ethernet IP in Automotive Applications
(Tuesday, October 3, 2023)
Ensuring IP Quality for a Better IP Experience
(Monday, October 2, 2023)
Alif Is Creating SoC Solutions for Machine Learning with Cadence and Arm
(Monday, October 2, 2023)
Cadence Targets Automotive Market Demands with UCIe
(Monday, October 2, 2023)
How LPDDR5X Delivers the Speed Your Designs Need
(Thursday, September 28, 2023)
Is DisplayPort really the future standard?
(Thursday, September 28, 2023)
MIPI DPHY Solution
(Wednesday, September 27, 2023)
AI Audio for Voice Enhancement: Deep into the Deep - Part 3
(Tuesday, September 26, 2023)
Formal verification best practices: investigating a deadlock
(Tuesday, September 26, 2023)
Renesas Collaborates on Large Language Model Generative AI Chip Design
(Friday, September 22, 2023)
Samsung Foundry and Synopsys Accelerate Multi-Die System Design
(Friday, September 22, 2023)
Demystifying the Qualification Process for Automotive Certification: ISO 26262 Compliance for CSI IP Products and Reliability Testing
(Friday, September 22, 2023)
New Unified Electrostatic Reliability Analysis Solution Has Your Chip Covered
(Thursday, September 21, 2023)
Formal verification best practices to reach your targets
(Tuesday, September 19, 2023)
VESA Display Stream Compression (DSC) Encoder IP Core
(Tuesday, September 19, 2023)
Focus on Memory at AI Hardware Summit
(Tuesday, September 19, 2023)
Configurable LLDB for (not only) embedded RISC-V processors
(Monday, September 18, 2023)
Together, we are building the future of computing, on Arm
(Monday, September 18, 2023)
Infineon Drives Automotive MCU Performance Higher with Synopsys Interface IP
(Monday, September 18, 2023)
Verification of Integrity and Data Encryption (IDE) for CXL Devices
(Thursday, September 14, 2023)
How to Unlock the Power of Operator Fusion to Accelerate AI
(Thursday, September 14, 2023)
Five Key Techniques to Accelerate Software Bring-Up for Multi-Die Systems
(Wednesday, September 13, 2023)
Arm's Pitch
(Tuesday, September 12, 2023)
Reviewing different Neural Network Models for Multi-Agent games on Arm using Unity
(Tuesday, September 12, 2023)
Configurable LLDB for (not only) embedded RISC-V processors
(Tuesday, September 12, 2023)
Common Tensilica Software Stack Delivers Best-In-Class Edge AI Performance
(Monday, September 11, 2023)
Empowering AI-Enabled Systems with MIPI C/D-PHY Combo IP: The Complete Audio-Visual Subsystem and AI
(Monday, September 11, 2023)
How PCI Express Gives AI Accelerators a Super-Fast Jolt of Throughput
(Monday, September 11, 2023)
AI-Based Sequence Detection for IP and SoC Verification & Validation
(Monday, September 11, 2023)
Introducing Next-Generation Verdi Platform for AI-Driven Debug and Verification Management
(Friday, September 8, 2023)
Introducing Fab.da: A Comprehensive, AI-Powered Solution for Efficient Semiconductor Manufacturing
(Thursday, September 7, 2023)
|
Previous
|
15
|
16
|
17
|
...
|
Next
|
Previous
