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240 IP
201
0.0
PCIE Gen6 digital controller (End Point)
PCIE is a layered protocol high speed interconnect interface supporting speeds up to 64GT/S and multi lanes and links. The layers specified in PCIE sp...
202
0.0
PCIE Gen6 digital controller (Root Complex)
PCIE is a layered protocol high speed interconnect interface supporting speeds up to 64GT/S and multi lanes and links. The layers specified in PCIE sp...
203
0.0
PCIe GEN6 PHY
Designed for next-generation PCIe systems, the PCIe GEN6 PHY IP supports data rates up to 64GT/s per lane with advanced PAM4 signaling. It ensures eff...
204
0.0
PCIe Gen6.0 Retimer
Retimer that are Physical Layer protocol aware and that interoperate with any pair of Components with any compliant channel on each side of the Retime...
205
0.0
PCIE Gen7 Controller
Gen7 supports 128Gbps and backward compatible with previous versions of PCIE....
206
0.0
PCIe Multi-Function Option for DMA IP Cores
The PCI Express specification allows endpoints that incorporate several physical PCIe functions that share the same PCIe connection. Such endpoints ar...
207
0.0
PCIe Switch for USB4 Hubs, Hosts and Devices
Rambus PCIe Multi-port Switch for USB4 is a customizable, embedded Switch for PCI Express (PCIe) designed for implementations in USB4 devices. A fully...
208
0.0
PCIe2.0 PHY & Controller
The Innosilicon SERDES PHY is a highly configurable PHY capable of supporting speeds up to 25Gbps within a single lane. For this particular datasheet,...
209
0.0
PCIe2.1 PHY
The Innosilicon SERDES PHY is a highly configurable PHY capable of supporting speeds up to 25Gbps within a single lane. For this particular datasheet,...
210
0.0
PCIE4 PHY in SMIC 28HKCP
Brite Semiconductor's 16Gbps PCIe PHY and controller solution provide high efficient interconnection that is optimized for PPA performance. The System...
211
0.0
PCIE4 PHY in SMIC 28HKD 0.9/1.8V
Brite Semiconductor's 16Gbps PCIe PHY and controller solution provide high efficient interconnection that is optimized for PPA performance. The System...
212
0.0
PCIE4 PHY in SMIC 28HKD 0.9/2.5V
Brite Semiconductor's 16Gbps PCIe PHY and controller solution provide high efficient interconnection that is optimized for PPA performance. The System...
213
0.0
PCIe4/3/2/1 PHY & Controller
The Innosilicon PCIe4.0 PHY is a highly configurable PHY capable of supporting speeds up to 16Gbps within a single lane. For this particular datasheet...
214
0.0
PCIe5.0/4.0/3.0 PHY & Controller
INNOSILICON™ PCIe 5.0 IP combines a high-performance controller and PHY, which is fully compliant with PCIe 5.0/4.0/3.0, and PIPE specifications. The ...
215
0.0
SerDes PHY IP(12nm, 14nm, 22nm, 28nm)
M31 SerDes PHY IP provides high-performance, multi-lane capability and low power architecture for the high-bandwidth applications. The SerDes IP suppo...
216
0.0
SGMII PHY
The Innosilicon SGMII PHY is a highly programmable module that processes high-speed serial data to parallel data compatible with the IEEE802.3 1000BAS...
217
0.0
PHY for PCIe 6.0 and CXL for TSMC N4P/N5P
Most advanced PHY and Controller for HPC, AI/ML, Data communications, networking, and storage systems The Cadence® PHY IP for PCI Express® (PCIe®) 6....
218
0.0
PHY for PCIe 7.0 and CXL for TSMC N3E/N3P
Most advanced PHY and Controller for HPC, AI/ML, Data communications, networking, and storage systems The Cadence® PHY IP for PCI Express® (PCIe®) 7....
219
0.0
PHY IP for PCIe 6.0 on TSMC N5
The multi-channel Synopsys PHY IP for PCI Express (PCIe) 6.0 meets today’s demands for higher bandwidth and power efficiency across network interface ...
220
0.0
PHY layer solution for PCIe1.1/PCIe2.0 with a serial interface and PIPE3 compliant digital interface
KA13UGPEP20ST001 provides a complete PHY layer solution for PCIe1.1/PCIe2.0 (2.5/5.0Gbps) for single lane application. It has a serial interface and P...
221
0.0
High Performance, Low Latency PCIe Gen5 PHY
Terminus Circuits offers best-in-class PHY IP for PCI Express Gen 5/4/3/2/1. The PHY is designed for low latency, low power, small form factor, high i...
222
0.0
High Speed Access & Test IP PCIE Version
High speed access for test and in-chip sensor & monitor data throughout the silicon lifecycle. Within the SiliconMAX Platform, High-Speed Access & Tes...
223
0.0
Single Lane and Quad Lane 16Gbps PCIe4.0 PHY IP in TSMC 28HPC process
TERMINUS CIRCUITS PCIe GEN4.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol an...
224
0.0
Single Lane and Quad Lane 5Gbps PCIe2.0 PHY IP in GF 28SLP process
TERMINUS CIRCUITS PCIe GEN2.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol a...
225
0.0
Single Lane and Quad Lane 5Gbps PCIe2.0 PHY IP in TSMC 28HPC process
TERMINUS CIRCUITS PCIe GEN2.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol an...
226
0.0
Single Lane and Quad Lane 5Gbps PCIe2.0 PHY IP in TSMC 55LP process
TERMINUS CIRCUITS PCIe GEN2.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol an...
227
0.0
Single Lane and Quad Lane 5Gbps PCIe2.0 PHY IP in TSMC 65GP process
TERMINUS CIRCUITS PCIe GEN2.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol an...
228
0.0
Single Lane and Quad Lane 8Gbps PCIe3.0 PHY in Samsung 28LPP process
TERMINUS CIRCUITS PCIe GEN3.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol an...
229
0.0
Single Lane and Quad Lane 8Gbps PCIe3.0 PHY IP in GF 28SLP process
TERMINUS-CIRCUITS PCIe GEN3.0 PHY is high performance, low power, low latency Single &Quad-Lane PCI Express PHY that supports PCI Express protocol and...
230
0.0
Single Lane and Quad Lane 8Gbps PCIe3.0 PHY IP in TSMC 28HPC process
TERMINUS CIRCUITS PCIe GEN3.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol an...
231
0.0
Single Lane and Quad Lane 8Gbps PCIe3.0 PHY IP in TSMC 65G process
TERMINUS CIRCUITS PCIe GEN3.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol an...
232
0.0
Ultra Low-Latency IP PCI-express Framework
LeWiz makes available its low-latency PCI-express framework for IP licensing - targeting low-latency applications such as those in the financial secto...
233
0.0
FPGA Proven PCIe GEN6 Controller
PCIe GEN6 Controller IP Delivers data speed up to 64GT/s (Gigatransfers per second) per lane. Multi-channel packet processing and enhanced RAS capabil...
234
0.0
USB 3.0/ PCIe 2.0 Combo PHY IP, Silicon Proven in TSMC 28HPC+
The Combo PHY is a complete USB 3.0 and PCIe 2.0 PHY IP solution designed for a mobile and data consumer applications in TSMC 28nm process. It support...
235
0.0
Multi-Function PCI Master/Target Interface Core
The PCI-M32MF implements a master/target PCI interface compliant with the PCI 2.3 specification. It supports a 32-bit address/data bus and operates up...
236
0.0
CXL 3.0 Device Controller
CXL is high bandwidth, low latency interconnect lies between host processor and memory devices/accelerators or other network interface cards. CXL ca...
237
0.0
Synopsys PCIe 4.0 PHY IP for TSMC N7
The multi-channel Synopsys PHY IP for PCI Express® 4.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...
238
0.0
Synopsys PCIe 5.0 PHY IP for SF5
The multi-channel Synopsys PHY IP for PCI Express® 4.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...
239
0.0
Synopsys PCIe 7.0 PHY IP for SF4X
The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 7.0 meets today’s demands for higher bandwidth and power efficiency across backplane, and c...
240
0.0
Synopsys PCIe 7.0 PHY IP for TSMC N3P
The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 7.0 meets today’s demands for higher bandwidth and power efficiency across backplane, and c...
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