Design & Reuse
20 IP
1
195.0
PCIe 7.0 Retimer Controller
The Rambus PCI Express® (PCIe®) 7.0 Retimer Controller provides a complete digital data path solution that delivers best-in-class latency, power and a...
2
190.0
PCIe 6.2 Switch
The Rambus PCI Express® (PCIe®) 6.2 Switch is a customizable, multiport embedded switch for PCIe designed for ASIC implementations. It enables the con...
3
40.0
PCIe Gen6 Controller
Our latest PCIe gen 6 controller IP, which is "NoC aware", provides a high-speed interface for efficient data transfer and system communication, suppo...
4
38.0
PCIe 6.x / PCIe5.x / PCIe4.x / PCIe3.x / PCIe2.x / PCIe1.x Controller
The Controller IP is customer configurable and supports PCIe 6.x/PCIe5.x/PCIe4.x/PCIe3.x/ PCIe2.x/PCIe1.x Specifications. The Controller IP support la...
5
10.0
Configurable CCIX controllers for CCIX 32G supporting Endpoint, Root Complex, Switch Port, and Dual Mode applications
Synopsys’ complete CCIX IP solution consisting of controller, PHY and verification IP, delivers data transfer rates up to 32GT/s and supports cache c...
6
10.0
Configurable controllers for PCIe 4.0 and CCIX supporting Dual Mode applications
The complete silicon-proven Synopsys IP solution, consisting of configurable digital controllers, PHYs, Integrity and Data Encryption (IDE) Security M...
7
10.0
Configurable controllers for PCIe 6.0 supporting Endpoint, Root Complex, Switch Port, and Dual Mode applications
The complete silicon-proven Synopsys IP solution, consisting of configurable digital controllers, PHYs, Integrity and Data Encryption (IDE) Security M...
8
10.0
Supports all key features and performance requirements in the CXL 3.0, 2.0, 1.1 and 1.0 specifications
The Synopsys Compute Express Link (CXL) Controller IP implements the port logic required to build a CXL device, host or switch, and can be configured ...
9
1.0
PCIe 2.0 End Point IP Core - PCIe with FIFO Interface
The Arasan PCI Express End Point is a high-speed, high-performance, and lowpowerIP core that is fully compliant to the PCI Express Specification 1.1 a...
10
0.0
UCIE 1.0
Support for multiple protocol PCIE/CXL/Streaming...
11
0.0
PCIe 3.0, 2.1, 1.1 Controller with the PHY Interface for PCI Express (PIPE) specification and native user interface support
Rambus PCIe 3.0 Controller is a highly configurable PCIe 3.0 interface Soft IP designed for ASIC and FPGA implementations supporting endpoint, root po...
12
0.0
PCIe 6.2 Switch IP Controller
...
13
0.0
PCIe 7.0 Integrity and Data Encryption (IDE) Security IP Module
PCI Express is a ubiquitous interface for a wide variety of applications, from connecting accelerators and peripheral devices to data center servers t...
14
0.0
PCIe Controller Testbench
PCIe Testbench from Rambus emulates a Root Complex device enabling simulation of a PCI Express design. This includes the following features: • R...
15
0.0
PCIE Gen6 digital controller (Dual Mode)
PCIE is a layered protocol high speed interconnect interface supporting speeds up to 64GT/S and multi lanes and links. The layers specified in PCIE sp...
16
0.0
PCIE Gen6 digital controller (Root Complex)
PCIE is a layered protocol high speed interconnect interface supporting speeds up to 64GT/S and multi lanes and links. The layers specified in PCIE sp...
17
0.0
PCIe Gen6.0 Retimer
Retimer that are Physical Layer protocol aware and that interoperate with any pair of Components with any compliant channel on each side of the Retime...
18
0.0
PCIE Gen7 Controller
Gen7 supports 128Gbps and backward compatible with previous versions of PCIE....
19
0.0
FPGA Proven PCIe GEN6 Controller
PCIe GEN6 Controller IP Delivers data speed up to 64GT/s (Gigatransfers per second) per lane. Multi-channel packet processing and enhanced RAS capabil...
20
0.0
CXL 3.0 Device Controller
CXL is high bandwidth, low latency interconnect lies between host processor and memory devices/accelerators or other network interface cards. CXL ca...