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Browse Interface Controller & PHY
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2025 IP
501
9.0
USB 20Gbps Device Controller
Leveraging the benefits of USB 10Gbps and 5Gbps device controller, USB 20Gbps is designed using the FPGA built-in transceiver. It is a one-stop soluti...
502
9.0
USB IP
...
503
8.0
PCIe 3.0/2.0 PHY
With sophisticated architecture and advanced technology, KNiulink PCIE GEN3/GEN2 PHY IP with PMA and PCS layer is designed for low power and high perf...
504
7.5
I2C Master/Slave Controller (Exclusively for Turnkey ASIC design; not for standalone licensing)
I2C slave enables communication with an I2C master using the standard I2C protocol. It is designed for easy integration into SoC, such as sensors or m...
505
7.5
UART/Serial Port (Exclusively for Turnkey ASIC design; not for standalone licensing)
The Serial Port IP (RS232, RS422, RS485) is a Single Port Standalone IP, which supports all the features in the modes like 16C450, 16C550, 16C550Ex, 1...
506
7.5
IEEE1284 Parallel Port Controller (Exclusively for Turnkey ASIC design; not for standalone licensing)
The IEEE1284 compliant parallel port controller supports faster data rates up to 2.0Mbytes/sec. It supports Nibble mode, Byte Mode, EPP, and ECP. Auto...
507
7.5
Generic GPIO Controller (Exclusively for Turnkey ASIC design; not for standalone licensing)
General Purpose I/O pins are used for system control and connection of various devices. This (GPIO) controller provides dedicated general-purpose pins...
508
7.5
SPI Master/Slave Controller (Exclusively for Turnkey ASIC design; not for standalone licensing)
SPI Controller IP enables synchronous serial communication with slave or master peripherals. It has Generic interface which programs the control and d...
509
7.5
USB 2.0 Device controller (Exclusively for Turnkey ASIC design; not for standalone licensing)
USB 2.0 Device controller implements a complete high/full speed peripheral controller that interfaces UTMI USB port transceiver on one side and to an ...
510
7.5
USB 2.0 Host controller (Exclusively for Turnkey ASIC design; not for standalone licensing)
USB 2.0 Host Controller supports high (480 Mbps), full (12 Mbps) and low (1.5 Mbps) speed operation. Supports Control, Bulk, Isochronous and Interrupt...
511
7.5
USB 3.0 Device Controller (Exclusively for Turnkey ASIC design; not for standalone licensing)
USB3.0 Device Controller IP Core provides an integrated and customizable solution for USB3.0 Device applications. The Core is compliant with USB3.0/2....
512
7.5
USB 3.0 Host Controller (Exclusively for Turnkey ASIC design; not for standalone licensing)
USB3.0 Host Controller IP core provides an integrated and customizable solution for USB3.0 Host applications. The Core supports USB3.0/2.0 Specificati...
513
7.5
USB 3.0 Retimer (Exclusively for Turnkey ASIC design; not for standalone licensing)"
USB3.0 Retimer softcore is designed for use USB Port/Cable Retimer applications. The requirements set forth in the specification comprehend the use of...
514
7.0
Display Controller - LCD / OLED Panels (AHB Bus)
The Digital Blocks DB9000AHB TFT LCD Controller IP Core interfaces a microprocessor and frame buffer memory via the AMBA 2.0 AHB Bus to a TFT LCD pane...
515
7.0
Display Controller - LCD / OLED Panels (AHB-Lite Bus)
The Digital Blocks DB9000AHB-Lite TFT LCD Controller IP Core interfaces a microprocessor and frame buffer memory via the AMBA 3.0 AHB-Lite Bus V1.0 to...
516
7.0
USB 2.0 Full/Low-Speed Device Core
The FHG USB DEV is a scalable, high performance IP-Module for usage in ASIC- and FPGA-designs to integrate full-speed USB 2.0 device functionality wi...
517
7.0
USB 2.0 Full/Low-Speed Embedded Host Controller
The FHG USB EHC is a scalable, high performance IP-Module for usage in ASIC- and FPGA-designs to integrate full-/low-speed USB 2.0 host functionality ...
518
7.0
USB 2.0 High/Full-Speed Device Core
The FHG USB2 DEV is a scalable, high performance IP-Module for usage in ASIC- and FPGA-designs to integrate high-/full-speed USB 2.0 device functiona...
519
7.0
USB 2.0 High/Full/Low-Speed Embedded Host Controller
The FHG USB2 EHC is a scalable, high performance IP-module for usage in ASIC and FPGA designs to integrate high/full/low-speed USB 2.0 host functiona...
520
7.0
USB 2.0 OTG Full/Low-Speed Dual Role Core
The FHG USB OTGDRD is a scalable, high performance IP-Module for usage in ASIC- and FPGA-designs to integrate full-/low-speed USB 2.0 device and host ...
521
7.0
USB 2.0 OTG High/Full/Low-Speed Dual Role Core
The FHG USB2 OTGDRD is a scalable, high performance IP-Module for usage in ASIC- and FPGA-designs to integrate high/full/low-speed USB 2.0 device and ...
522
6.0
I2C Controller IP
The TrueSilicon I2C Controller IP is a highly configurable and robust serial communication interface designed for seamless integration into modern Sys...
523
6.0
I2C Master/Slave Controller Core IP
I2C Master/Slave Controller core implements a bidirectional serial interface compatible with the NXP’s I2C bus specification and supports all transfer...
524
6.0
RapidIO PHY
RapidIO is a high performance, low pin count, packet switched, full duplex, system level interconnect architecture. The architecture addresses the nee...
525
6.0
AHB To PCI Wrapper
VinChip’s AHB to PCI wrapper can be used to verify AHB (AMBA) based systems on a PCI environment for ease of debugging the target hardware and it can ...
526
6.0
AHB2APB Bridge IP
Truechip's AHB2APB Bridge IP provides chip designers and architects, an efficient way to connect Different Bus Protocol based IPs with reduced latency...
527
6.0
CHI2AXI bridge IP
The CHI2AXI bridge is a high-performance protocol converter designed to enable seamless interoperability between CHI (Coherent Hub Interface) and AXI ...
528
6.0
TileLink2AXI Bridge IP
The TileLink2AXI Bridge is a synthesizable, high-performance IP designed to provide seamless interoperability between TileLink-based components and AM...
529
6.0
MIPI D-PHY Receiver with PPI
SP_MIPI_DPHY_RX_PPI _T28HPCP is a MIPI D-PHY Receiver, which complies with MIPI D-PHY specification version 1.2. This D-PHY design receives data from ...
530
6.0
MIPI D-PHY Receiver with PPI
SP_MIPI_DPHY_RX_PPI _T28HPCP is a MIPI D-PHY Receiver, which complies with MIPI D-PHY specification version 1.2. This D-PHY design receives data from ...
531
6.0
MIPI Rx D-PHY
...
532
6.0
Embedded Host Controller 1. 1
...
533
6.0
Embedded Host Controller 2.0
...
534
6.0
USB 1.1 Hub Controller
...
535
6.0
USB 1.1 Open Host Controller
...
536
6.0
USB 2.0 Device Controller (IF Certified)
...
537
6.0
USB 2.0 Host Controller (EHCI)
...
538
6.0
USB 2.0 PHY; SMIC 40nm LL
...
539
6.0
USB 2.0 PHY; SMIC 55nm LL
...
540
6.0
USB based High Speed System Debug IP
Architecture Independent Design Supports any AMBA AHB based System Easily portable to other buses such as Avalon Standard USB 2.0 interface to th...
541
6.0
USB2.0 On-The-Go
VinChip’s USB 2.0 High Speed OTG controller is designed for flexibility and ease of use and facilitates implementation of a wide variety of applicatio...
542
6.0
AXI Expander IP
The Truesilicon AXI Expander Block is a configurable IP designed for AXIbased systems where the data width of the Master Interface (MI) is smaller tha...
543
6.0
AXI Splitter IP
The AXI Splitter is a configurable IP designed to enable seamless data width conversion in AMBA AXI-based systems. It is primarily used when a wide da...
544
6.0
AXI- Interconnect : Advanced Extensible Interface Bus IP
The AMBA AXI protocol is targeted at high-performance, high-frequency system designs and includes a number of features that make it suitable for high-...
545
6.0
AXI2APB Bridge
Truechip's AXI2APB IP provides chip designers and architects, an efficient way to connect AXI & APB based IPs with reduced latency, power, and area....
546
6.0
AXI2APB Bridge IP
The TrueSilicon's AXI to APB Bridge is a high-performance protocol converter IP designed to enable seamless communication between AXI master devices a...
547
6.0
AXI2CHI Bridge IP
The AXI2CHI bridge is a high-performance protocol converter that enables seamless integration between AXI (Advanced eXtensible Interface) and CHI (Coh...
548
6.0
AXI2TileLink Bridge IP
The AXI2TileLink Bridge is a high-performance, synthesizable IP designed to enable seamless interoperability between AMBA AXI-based subsystems and Til...
549
5.0
I2C Master Serial Interface Controller
The CC-I2C_MST-APB is a synthesisable Verilog model of a I2C serial interface controller. The I2C core can be efficiently implemented on FPGA and ASIC...
550
5.0
I2C Master Serial Interface Controller
The CC-I2C_MST-AXI is a synthesisable Verilog model of a I2C serial interface controller. The I2C core can be efficiently implemented on FPGA and ASIC...
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