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1933 IP
251
20.0
TSMC 4nm (N4P) 2.5V Basekit Libraries
Synopsys provides system-on-chip (SoC) designers with an extensive offering of high-quality, foundation IP, including memory compilers, logic librarie...
252
20.0
TSMC 4nm (N4P) 2.5V Basekit Libraries, multiple metalstacks
Synopsys provides system-on-chip (SoC) designers with an extensive offering of high-quality, foundation IP, including memory compilers, logic librarie...
253
20.0
TSMC 5nm (N5) 1.2V/1.8V Basekit Libraries
Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...
254
20.0
TSMC 5nm (N5) 1.2V/1.8V Failsafe GPIO Libraries
Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...
255
20.0
TSMC 5nm (N5) 1.2V/1.8V Failsafe GPIO Libraries, multiple metalstacks
Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...
256
20.0
TSMC 5nm (N5) 1.2V/1.8V I3C Libraries
Synopsys I3C I/O library supports a simplified system of connecting and managing multiple sensors in a device. Multiple sensor secondary devices can b...
257
20.0
TSMC 5nm (N5) 1.2V/1.8V/2.5V Failsafe GPIO Libraries
Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...
258
20.0
TSMC 5nm (N5) 1.2V/1.8V/2.5V GPIO Libraries
Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...
259
20.0
TSMC 5nm (N5) 1.2V/1.8V/2.5V GPIO Libraries, multiple metalstacks
Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...
260
20.0
TSMC 5nm (N5) 1.8V SD/eMMC IO
Synopsys SD/eMMC PHY provides an optimal balance for cost and performance for storage solutions. Synopsys SD/eMMC PHY is a hard IP that can be used to...
261
20.0
TSMC 5nm (N5) 1.8V SD/eMMC PHY
Synopsys SD/eMMC PHY provides an optimal balance for cost and performance for storage solutions. Synopsys SD/eMMC PHY is a hard IP that can be used to...
262
20.0
TSMC 5nm (N5) 2.5V Basekit Libraries
Synopsys I3C I/O library supports a simplified system of connecting and managing multiple sensors in a device. Multiple sensor secondary devices can b...
263
20.0
TSMC 5nm (N5)1.8V SD/eMMC PHY, multiple metalstacks
Synopsys SD/eMMC PHY provides an optimal balance for cost and performance for storage solutions. Synopsys SD/eMMC PHY is a hard IP that can be used to...
264
20.0
TSMC 6nm (6FF) 3.3V GPIO
Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...
265
20.0
TSMC 6nm (6FF) 3.3V SMBUS (I2C) IO
Synopsys Inter-Integrated Circuit (I2C) I/O library is used for two wire interfaces to connect low-speed devices like EEPROM, A/D, and D/A converters ...
266
20.0
TSMC 6nm (N6) 3.3V Basekit Libraries
Synopsys provides system-on-chip (SoC) designers with an extensive offering of high-quality, foundation IP, including memory compilers, logic librarie...
267
20.0
TSMC 7nm (7FF) 1.8V LVDS
Synopsys Low Voltage Differential Signaling (LVDS) I/O library is a high-frequency interface that uses differential signals for data transmission. A f...
268
20.0
TSMC 7nm (7FF) 3.3V GPIO
Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...
269
20.0
eUSB2V2.0 IP
Arasan Chip Systems, the leading provider of IP for Mobile and Automobile SOC’s, presents its latest eUSB2 V2.0 IP. eUSB2 V2.0 is a new generation spe...
270
20.0
CXL memory expansion
DenseMem increases effective CXL Type 3 Device memory capacity by a factor of 2x through transparent, in-line memory compression/decompression with mi...
271
16.0
3.3V general purpose I/O for 28nm CMOS
The 3.3V capable GPIO is an IP macro for on-chip integration. It is a 3.3V general purpose I/O built with a stack of 1.8V thick oxide MOS devices. It ...
272
16.0
1.8V general purpose I/O for 4nm FinFET
The Sofics 1.8V capable GPIO is an IP macro for on-chip integration. It is a 1.8V general purpose I/O built with a stack of 1.2V MOS FINFET devices. I...
273
16.0
I3C and I2C Combo
It supports standard I3C, high-speed I3C, and Ultra-higher-speed I3C modes. Push-pull operation in I3C modes. Supports I2C standard mode, fast mode, f...
274
16.0
AHB-Lite APB4 Bridge
The Roa Logic AHB-Lite APB4 Bridge is a fully parameterized soft IP interconnect bridge between the AMBA 3 AHB-Lite v1.0 and AMBA APB v2.0 bus protoco...
275
16.0
AHB-Lite General Purpose Memory Module
The Roa Logic AHB-Lite Memory IP is a fully parameterized soft IP implementing on-chip memory for access by an AHB-Lite based Master. All signals defi...
276
16.0
AHB-Lite Multilayer Switch
The Roa Logic AHB-Lite Multi-layer Interconnect is a fully parameterized High Performance, Low Latency Interconnect Fabric soft IP for AHB-Lite. It al...
277
16.0
AHB-Lite Timer
The Roa Logic AHB-Lite Timer IP is a fully parameterized soft IP implementing a user-defined number of timers and functions as specified by the RISC-V...
278
16.0
RISC-V Compliant Platform Level Interrupt Controller
Fully Parameterized & Programmable Platform Level Interrupt Controller (PLIC) for RISC-V based Processor Systems supporting a user-defined number of i...
279
16.0
APB4 General Purpose Input/Output Module
The APB4 GPIO Core is fully parameterised core designed to provide a user-defined number of general purpose, bidirectional IO to a design. The IO a...
280
16.0
APB4 Multiplexer
The AMBA APB v2.0 bus protocol – commonly referred to as APB4 – defines a low-cost interface that is optimized for minimal power consumption and redu...
281
16.0
Open-drain I2C and SMBUS, DDC, CEC & HPD IO offerings
Certus is pleased to offer I2C open-drain IOs across multiple process technologies. The Certus I2C IO can support external supplies of 1.8V, 3.3V and...
282
15.0
3.3V general purpose I/O for 4nm FinFET
The Sofics 3.3V capable GPIO is an IP macro for on-chip integration. It is a 3.3V general purpose I/O built with a stack of 1.2V (1.5V overdrive) MOS ...
283
15.0
120dB PDM-to-PCM Digital Microphone Interface
The AR36T05 is a soft macro low-power high-performance digital microphone interface modulator IP. The IP converts stereo/mono 1-bit pulse-density modu...
284
15.0
Camera SLVS-EC 3.0 Transmitter 10.0Gbps 8-Lane
* The CL12811M8TIP10000 TXPHY supports 8 TX DATA lanes for up to 10Gbps application. A wide range phase-locked clock is embedded in the IP to suppor...
285
15.0
PCI Express (PCIe) 5.0 Controller
Application-optimized, high-performance controller IP for PCIe The Cadence® Controller IP for PCIe 5.0 provides the logic required to integrate a r...
286
15.0
PCI Express PHY serial link PIPE Transceiver IP cell/hard macro
SMS5000 is a fully integrated CMOS transceiver that handles the full Physical Layer PCI Express protocol and signaling. It contains all necessary AFE ...
287
15.0
PCIe 3.1 for TSMC
Optimized for power and area, our line-up of SerDes PHYs, deliver maximum performance and flexibility for today's most challenging designs. The 8Gb...
288
15.0
PCIe 5.0 PHY
With sophisticated architecture and advanced technology, KNiulink SerDes PHY IP with PMA and PCS layer is designed for low power and high performance ...
289
15.0
Serial ATA (SATA) I/II PHY IP CORE
SMS6000 is a Serial ATA gen I and gen II compliant PHY IP which supports SAPIS and Serial Attached SCCI (SAS) specifications both at 1.5 Gbp/s and 3.0...
290
15.0
VESA DisplayPort DP 1.4a / eDP 1.4b RX Controller ( LINK ) with HDCP 1.4 / 2.3 , MST
Silicon Library's DisplayPort DP 1.4a / eDP 1.4b RX Controller ( LINK ) works with PHY IPs by Silicon Library or customers' PHYs. HDCP 1.4 / 2.3 and o...
291
15.0
VESA DisplayPort DP 1.4a / eDP 1.4b TX Controller ( LINK ) with HDCP 1.4 / 2.3
Silicon Library’s DisplayPort DP1.4a / eDP 1.4b TX Controller works with PHY IPs by Silicon Library or customers' PHYs. HDCP 1.4 / 2.3 and other vari...
292
15.0
PHY for PCIe 6.0 and CXL for Samsung Automotive
Most advanced PHY and Controller for HPC, AI, ML, Data communications, networking, and storage systems The Cadence® PHY IP for PCI Express® (PCIe®)...
293
15.0
USB2.0 PHY, 8-bit or a 16-bit parallel interface, remaining backward compatible with USB1.1 legacy protocol at 12Mbps
KA13UGUSB20ST001 is USB2.0 physical layer transceiver (PHY) integrated circuits. The PHY can be configured for either an 8-bit or a 16-bit parallel in...
294
15.0
TSMC 13.1Gbps Multi-Protocol Low-Power SerDes IP
It is a 4-lane Serializer/Deserializer IP supporting data rates from 500Mbps to 13.1Gbps. It features flexible architecture for multiple high-speed se...
295
15.0
TSMC 25Gbps SerDes IP with Equalizer
This is a high-performance, multi-protocol serial transceiver IP that supports data rates from 1Gbps to 26Gbps. Built on TSMC 12nm technology, it is d...
296
15.0
SWI3S Manager core IP
Arasan’s SWI3S (SoundWire I3S Interface) Manager Controller Core IP implements the link protocol to communicate in half-duplex fashion to transfer the...
297
14.0
10Gbps Multi-Protocol PHY IP
Silicon-proven PHY for PCIe, USB, Ethernet, DisplayPort, and other protocols The PHY IP is designed to deliver high eye-margin at low power for backp...
298
12.0
105dB PCM-to-PDM Stereo Converter
The AR37T01 is a digitally coded stereo PCM-to-PDM conversion IP with 8-bit pattern-code programming. The IP translates parallel PCM input data in...
299
12.0
JESD204b Deser PHY GF 22FDX/ GF 22FDX-PLUS
InCirT offers Deserializer PHY that is implemented in Global Foundries 22FDX CMOS technology. The IP macro offers 2x lanes with data rates from 6.375 ...
300
12.0
JESD204b Ser PHY GF 22FDX/ GF 22FDX-PLUS
InCirT offers Serializer PHY that is implemented in Global Foundries 22FDX CMOS technology. The IP macro offers 1x lane with data rates from 6.375 Gbp...
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