Design & Reuse
arrow AMBA AHB / APB/ AXI (186)
arrow CXL (19)
arrow D2D (57)
arrow Gen-Z (6)
arrow HDMI (86)
arrow I2C (99)
arrow Interlaken (2)
arrow MIL-STD-1553 (3)
arrow MIPI (487)
arrow Multi-Protocol PHY (31)
arrow PCI (223)
arrow RapidIO (6)
arrow SAS (5)
arrow SATA (74)
arrow Serdes (92)
arrow Smart Card (3)
arrow USB (393)
arrow V-by-One (22)
arrow VESA (78)
arrow Other (27)
1899 IP
301
14.0
I3C Controller
Controller IP for the MIPI I3C interface The Cadence® IP Family for MIPI® Protocols delivers area-optimized interface IP with the low power and high ...
302
14.0
PCI Express (PCIe) 2.1 Controller
Application-optimized, high-performance controller IP for PCIe The Cadence® Controller IP for PCIe® 2.0 is a solution created for less demanding desi...
303
14.0
PCI Express (PCIe) 3.1 Controller
Application-optimized, high-performance controller IP for PCIe The Cadence® Controller IP for PCIe® 3.1 is a solution created for mobile applications...
304
14.0
PCI Express (PCIe) 4.0 Controller
Application-optimized, high-performance controller IP for PCIe The Cadence® Controller IP for PCIe 4.0 provides the logic required to integrate a roo...
305
14.0
PCI Express (PCIe) 5.0 Controller
Application-optimized, high-performance controller IP for PCIe The Cadence® Controller IP for PCIe 5.0 provides the logic required to integrate a roo...
306
14.0
MIPI CSI-2 RX Controller for v2.1
CSI-2 receiver controller for application processor The Cadence® Receiver (RX) Controller IP for MIPI® Camera Serial Interface 2 (CSI-2SM) is respons...
307
14.0
MIPI CSI-2 TX Controller for v2.1
CSI-2 transmitter controller for application processor The Cadence® Transmitter (TX) Controller IP for MIPI DSI is compliant with the MIPI® Alliance ...
308
14.0
MIPI D-PHY for TSMC
D-PHY physical layer Developed by experienced teams with industry-leading domain expertise and extensively validated by multiple hardware platforms, ...
309
14.0
MIPI DSI TX Controller
DSI transmitter controller for application The Cadence® Transmitter (TX) Controller IP for MIPI DSI is compliant with the MIPI® Alliance Specificatio...
310
14.0
UltraLink Controller
Ultralink controller for high performance die-to-die interconnect on streaming, CXS, and AXI protocols The Cadence Ultralink Controller enables a pro...
311
14.0
Universal Chiplet Interconnect Express (UCIe 1.0) Controller
Ultra-low latency UCIe controller for standard industry chiplet interoperability on streaming, PCIe, and CXL protocols The Cadence UCIe™ Controller i...
312
14.0
Controller for MIPI Soundwire
Audio data transport The Cadence® IP Family for MIPI® Protocols delivers area-optimized interface IP with the low power and high performance required...
313
14.0
USB 2.0 Controller
Mature controller solution for OTG and Device applications Certified for compliance with Universal Serial Bus Specification, Revision 2.0, the Cadenc...
314
14.0
USB 2.0 PHY for TSMC
Proven PHY IP for USB Device, Host, and OTG with small footprint and low active power The ubiquity of USB 2.0 in devices makes it nearly mandatory fo...
315
14.0
USB 3.0 xHCI Host Controller
Mature solutions featuring xHCI Host, Device, and Dual-Role Device Compliant with Universal Serial Bus 3.0 Specification, Revision 1.0 and xHCI Speci...
316
14.0
USB 3.1 Device Controller
Mature solutions featuring xHCI Host, Device, and Dual-Role Certified for compliance with USB 3.1 Specification v1.0, and xHCI Specification v1.0, th...
317
14.0
Dual-Role Device Controller for USB 3.0
Mature solutions featuring xHCI Host, Device, and Dual-Role Certified for compliance with USB 3.0 Specification v1.0, and xHCI Specification v1.0, th...
318
14.0
Dual-Role Device Controller for USB 3.1
Mature solutions featuring xHCI Host, Device, and Dual-Role Certified for compliance with USB 3.1 Specification v1.0, and xHCI Specification v1.0, th...
319
14.0
CXL Controller
Low-latency Controller IP for cache-coherent root-port, end-point, and dual-mode applications The Cadence® Controller IP for CXL provides the logic r...
320
13.0
Multiplexing transceiver with 4 CSI2 inputs and a single CSI2 output
This IP multiplexes inputs from up to 4 CSI2 cameras, each with up to 4 data lanes, to a single CSI2 output stream, with up to 4 lanes. It comprises o...
321
12.0
105dB PCM-to-PDM Stereo Converter
The AR37T01 is a digitally coded stereo PCM-to-PDM conversion IP with 8-bit pattern-code programming. The IP translates parallel PCM input data in...
322
12.0
PCI Express PHY serial link PIPE Transceiver IP cell/hard macro
SMS5000 is a fully integrated CMOS transceiver that handles the full Physical Layer PCI Express protocol and signaling. It contains all necessary AFE ...
323
12.0
Serial ATA (SATA) I/II PHY IP CORE
SMS6000 is a Serial ATA gen I and gen II compliant PHY IP which supports SAPIS and Serial Attached SCCI (SAS) specifications both at 1.5 Gbp/s and 3.0...
324
12.0
USB 2.0 Device Transceiver PHY
...
325
12.0
USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in TSMC 16FFC
The combo PHY consist of Peripheral Component Interconnect Express (PCIe) compliant with PCIe 2.0 Base Specification with support of PIPE interface sp...
326
11.0
I2S/Left-Justified/TDM Digital Audio Interface
The AR38U12 is a soft macro IP supporting industry-standard I2S, Left-Justified and Time-Division-Multiplexed (TDM) serial interface to parallel PCM (...
327
11.0
Die-to-Die (D2D) Interconnect
Lightweight die-to-die interconnect solution optimized for highest performance with the lowest power and area overhead...
328
11.0
MIPI C-PHY DSI TX (Transmitter/Host) IP in TSMC 22ULL
The MXL-CPHY-2p5G-DSI-TX-T-22ULL is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificati...
329
11.0
MIPI C-PHY/D-PHY Combo 2-Lane CSI-2 TX+ IP in TSMC 40ULP
The MXL-CDPHY-2L-CSI-2-TX+-40ULP is a high-frequency, low-power, low-cost, sourcesynchronous, physical Layer supporting the MIPI Alliance Specificatio...
330
11.0
MIPI C-PHY/D-PHY Combo CSI-2 TX+ IP 3.5Gsps/2.5Gbps
The MXL-CD-PHY-CSITX+-ST-28FDSOI is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificati...
331
11.0
MIPI C-PHY/D-PHY Combo DSI RX (Receiver) IP in TSMC 22ULP
The MXL-CDPHY-DSI-RX-T-22ULP is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification f...
332
11.0
MIPI C-PHY/D-PHY Combo Universal IP, 4.5Gsps/4.5Gbps in TSMC 22ULP
The MXL-CD-PHY-UNIV-T-22ULP is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification fo...
333
11.0
MIPI D-PHY
...
334
11.0
MIPI D-PHY CSI-2 TX (Transmitter) in TSMC 28HPC+
The MXL-DPHY-CSI-2-TX-T-28HPC+ is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification...
335
11.0
MIPI D-PHY CSI-2 TX+ (Transmitter) IP in TSMC 22ULL
The MXL-DPHY-CSI-2-TX+-T-22ULL is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification...
336
11.0
MIPI D-PHY DSI RX (Receiver/Peripheral) in UMC 22ULP/22ULL
The MXL-DPHY-DSI-RX-U-22ULP-22ULL is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificat...
337
11.0
MIPI D-PHY IP 4.5Gbps in TSMC N7
The MXL-DPHY-DSI-TX-T-N07 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification for ...
338
11.0
MIPI D-PHY Universal IP in TSMC 28HPC+
The MXL-DPHY-UNIV-T-28HPC+ is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificatio...
339
11.0
MIPI D-PHY Universal IP in UMC 28HPC+
The MXL-DPHY-UNIV-U-28HPC+ is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification for...
340
11.0
MIPI M-PHY HS-G4 IP (M-PHY v4.1) in TSMC 40G
The MXL-MIPI-M-PHY is a high-frequency low-power, low-cost, Physical Layer IP compliant with the MIPI Alliance Standard for M-PHY. The IP can be used ...
341
11.0
DMA AXI4-Stream to/from AXI4 Memory Map - Scatter-Gather Command Stream List
The Digital Blocks DB-DMAC-MC2-CS-MM2S-S2MM Verilog RTL IP Core is a Multi-Channel Scatter-Gather DMA Controller that transfers data between AXI4 Memo...
342
11.0
DMA AXI4-Stream to/from AXI4 Memory Map - Scatter-Gather Descriptor List
The Digital Blocks DB-DMAC-MC2-DL-MM2S-S2MM Verilog RTL IP Core is a Multi-Channel Scatter-Gather DMA Controller that transfers data between AXI4 Memo...
343
10.0
1-10G Low Power SERDES - TSMC 40G
Analog Bits Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports multi-protoc...
344
10.0
1-15G SERDES PCIe3/HMC SERDES PHY - TSMC 16FF+GL
Analog Bits Programmable SERDES provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports multi-protoc...
345
10.0
D-phy 1.2 on tsmc 22nm with ultra low power
Arasan Chip Systems announces the immediate availability its MIPI D-PHY IP supporting speeds of upto 2.5 gbps for TSMC 22nm SoC designs. The MIPI D-...
346
10.0
I2C & SMBus Controller
The I2C-SMBUS core implements a serial interface controller for the Inter-Integrated Circuit (I2C) bus and the System Management Bus (SMBus). The cor...
347
10.0
I2C and SPI Master/Slave Controller
The I2CSPI-CTRL is a compact and versatile serial interface controller supporting both SPI (Serial Peripheral Interface) and I2C (Inter-Integrated Cir...
348
10.0
12G Ethernet PHY in Samsung (14nm)
The complete silicon-proven Synopsys IP solution, consisting of configurable digital controllers, PHYs, Integrity and Data Encryption (IDE) Security M...
349
10.0
12G Ethernet PHY in TSMC (28nm, 16nm, 12nm)
The complete silicon-proven Synopsys IP solution, consisting of configurable digital controllers, PHYs, Integrity and Data Encryption (IDE) Security M...
350
10.0
12G Ethernet PHY in UMC (28nm)
The complete silicon-proven Synopsys IP solution, consisting of configurable digital controllers, PHYs, Integrity and Data Encryption (IDE) Security M...