Design & Reuse
8402 IP
1901
0.118
Single Port SRAM Compiler IP, UMC 55nm LP process
UMC 55um LP Low-K process ULL Singal-Port SRAM compiler....
1902
0.118
Single Port SRAM Compiler IP, UMC 55nm LP process
UMC 55um LP Low-K process Singal-Port SRAM compiler with redundancy feature....
1903
0.118
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm eFlash with peripheral HVT Single Port SRAM compiler....
1904
0.118
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm SP Low-K Logic process Synchronous Single Port SRAM using 0.425-Bit cell memory compiler....
1905
0.118
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm eFlash with peripheral HVT & redundancy Single Port SRAM....
1906
0.118
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm SP Low-K Logic process Low Power synchronous high density Single Port SRAM memory compiler....
1907
0.118
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm SP/RVT Low-K Logic process synchronous Low Power (PG-DC) using 0.425-Bit cell Single Port SRAM memory compiler....
1908
0.118
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm SP/RVT+HVT Low-K Logic process synchronous high density Single Port SRAM memory compiler....
1909
0.118
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm SP Low-K Logic process synchronous ultra high speed Single Port SRAM memory compiler....
1910
0.118
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm SP Low_K Logic process synchronous high density Single Port SRAM memory compiler....
1911
0.118
Single Port SRAM Compiler IP, UMC 65nm LL process
UMC 65nm LL/RVT Low-K Logic process 1-port high density memory compiler....
1912
0.118
Single Port SRAM Compiler IP, UMC 65nm SP process
UMC 65nm standard performance Logic process synchronous extra high speed Single Port SRAM memory compiler....
1913
0.118
Single Port SRAM Compiler IP, UMC 65nm SP process
UMC 65nm SP Low-K Logic process synchronous high density Single Port SRAM memory compiler....
1914
0.118
Single Port SRAM Compiler IP, UMC 80nm HV process
UMC 80nm HV process Single Port SRAM memory compiler....
1915
0.118
Single Port SRAM Compiler IP, UMC 90nm CIS process
UMC 90nm CMOS Image Sensor process 1P3M Single Port SRAM compiler....
1916
0.118
Single Port SRAM Compiler IP, UMC 90nm LL process
UMC 90nm LL Low-K RVT process synchronous Single Port SRAM memory compiler....
1917
0.118
Single Port SRAM Compiler IP, UMC 90nm LL process
UMC 90nm LL/RVT Synchronous high density Single Port SRAM memory compiler....
1918
0.118
Single Port SRAM Compiler IP, UMC 90nm LL process
UMC 90nm Logic process low leakage devices synchronous Low Power Single Port hihg density memory compiler....
1919
0.118
Single Port SRAM Compiler IP, UMC 90nm SP process
UMC 90nm Logic process SP/ Low-K synchronous high density Single Port SRAM memory compiler....
1920
0.118
Single Port SRAM Compiler IP, UMC 90nm SP process
UMC 90nm SP/RVT/ Low-K process synchronous ultra high speed SRAM compiler....
1921
0.118
Single Port SRAM Compiler IP, UMC 90nm SP process
UMC 90nm SP/RVT Low-K Logic process high density Single Port 6T SRAM Memory Complier....
1922
0.118
Single Port SRAM Compiler IP, UMC 90nm SP process
UMC 90nm SP Low-K Logic process Low Power synchronous high density Single Port SRAM memory compiler....
1923
0.118
Cipher coprocess for encryption/decryption of DES/Triple-DES/AES algorithm.
Cipher coprocess for encryption/decryption of DES/Triple-DES/AES algorithm....
1924
0.118
MIPI Controller IP, CSI-2 Receiver, High-Speed 80Mbps to 1.5Gbps per data lane, Soft IP
MIPI CSI Receiver Controller....
1925
0.118
MIPI Controller IP, CSI-2 Transmitter, High-Speed 80Mbps to 1.5Gbps per data lane, Soft IP
MIPI Transmitter Controller....
1926
0.118
MIPI Controller IP, DSI Host, Soft IP
DSI Host Controller....
1927
0.118
MIPI Controller IP, DSI Peripheral, Soft IP
MIPI DSI Peripheral Controller....
1928
0.118
MIPI CSI Receiver 1G/ SLVDS 1G /HiSPi 1G, 1.8V/3.3V GPI 100MHz; UMC 28nm HPC Logic Process
MIPI CSI Receiver 1G/ SLVDS 1G /HiSPi 1G, 1.8V/3.3V GPI 100MHz; UMC 28nm HPC Logic Process...
1929
0.118
MIPI D-PHY Receiver IP, 80Mbps - 1.5Gbps, UMC 40nm LP process
MIPI Receiver 80Mbps-1.5Gbps, UMC 40nm LP Low-K Logic process....
1930
0.118
MIPI D-PHY Receiver IP, 80Mbps - 1.5Gbps, UMC 55nm SP process
MIPI Receiver 80~1500MHz, UMC 55nm SP/RVT Low-K Logic process....
1931
0.118
MIPI D-PHY Receiver IP, 80Mbps - 1Gbps, UMC 40nm LP process
MIPI Receiver 80Mbps-1Gbps, UMC 40nm LP Low-K Logic process....
1932
0.118
MIPI D-PHY Receiver IP, 80Mbps - 1Gbps, UMC 40nm LP process
MIPI Receiver 80Mbps-1Gbps, Combo PHY for MIPI & HiSPi & LVDS & SubLVDS, UMC 40nm LP Low-K Logic process....
1933
0.118
MIPI D-PHY Receiver IP, 80Mbps - 1Gbps, UMC 40nm LP process
MIPI Receiver 80Mbps-1Gbps, Combo PHY for MIPI & HiSPi & LVDS & SubLVDS, UMC 40nm LP Low-K Logic process, Two Lane....
1934
0.118
MIPI D-PHY Transmitter IP, 80Mbps - 1.5Gbps, UMC 40nm LP process
MIPI Transmitter 80Mbps~1500Mbps combo with CMOS input, UMC 40nm LP Low-K process....
1935
0.118
MIPI D-PHY Transmitter IP, 80Mbps - 1.5Gbps, UMC 40nm LP process
MIPI Transmitter 80~1500MHz with 1-clock lane, 4-data lanes, UMC 40nm LP/RVT/LVT Low-K process....
1936
0.118
MIPI D-PHY Transmitter IP, 80Mbps - 1.5Gbps, UMC 40nm LP process
MIPI Transmitter 80Mbps~1.5Gbps with 1-clock lane, 2-data lanes, UMC 40nm LP/RVT/LVT Low-K process....
1937
0.118
MIPI D-PHY Transmitter IP, 80Mbps - 1.5Gbps, UMC 40nm LP process
MIPI Transmitter 80Mbps~1.5Gbps, UMC 40nm LP/RVT/LVT Low-K process....
1938
0.118
MIPI D-PHY Transmitter IP, 80Mbps - 1.5Gbps, UMC 55nm SP process
MIPI Transmitter 80~1500MHz, UMC 55nm SP/RVT Low-K Logic process....
1939
0.118
MIPI D-PHY Transmitter IP, 80Mbps - 1Gbps, UMC 40nm LP process
MIPI Transmitter 80~1000MHz, UMC 40nm LP/RVT Low-K process....
1940
0.118
MIPI DPHY Reciever 80Mbps~2.5Gbps ; UMC 28nm HPC Logic Process
MIPI DPHY Reciever 80Mbps~2.5Gbps ; UMC 28nm HPC Logic Process...
1941
0.118
MIPI DPHY Reciever 80Mbps~2.5Gbps ; UMC 28nm HPC+ Process
MIPI DPHY Reciever 80Mbps~2.5Gbps ; UMC 28nm HPC+ Process...
1942
0.118
MIPI M-PHY IP, UMC 40nm LP process
MIPI MPHY 6Gbps/lane, UMC 40nm LP Low-K process....
1943
0.118
MIPI On-Die Termination ; UMC 28nm HPC process
...
1944
0.118
MIPI Receiver 80Mbps-1Gbps; 40nm LP LowK Logic Process
MIPI Receiver 80Mbps-1Gbps; 40nm LP LowK Logic Process...
1945
0.118
MIPI Receiver CPHY 80Msps~2.5Gsps; DPHY 80Mbps~2.5Gbps ; UMC 28nm HPC process_x005F_x005F_x005F_x005F_x005F_x000D_
MIPI Receiver CPHY 80Msps~2.5Gsps; DPHY 80Mbps~2.5Gbps ; UMC 28nm HPC process...
1946
0.118
MIPI Receiver, DPHY V1.1 RX ; UMC 28nm HPC process
MIPI Receiver, DPHY V1.1 RX ; UMC 28nm HPC process...
1947
0.118
MIPI Receiver, DPHY V1.2 RX ; UMC 28nm HPC process
MIPI Receiver, DPHY V1.2 RX ; UMC 28nm HPC process...
1948
0.118
MIPI Receiver,DPHY RX V1.2; UMC 28nm HPC Logic and Mixed-Mode Process
MIPI Receiver,DPHY RX V1.2; UMC 28nm HPC Logic and Mixed-Mode Process...
1949
0.118
MIPI RX 80Mbps~2.5Gbps ; UMC 28nm HPC+ process
MIPI RX 80Mbps~2.5Gbps ; UMC 28nm HPC+ process...
1950
0.118
MIPI Transmitter 80Mbps~1.5Gbps ; UMC 28nm HPC Logic Process
MIPI Transmitter 80Mbps~1.5Gbps ; UMC 28nm HPC Logic Process...