Catalog of SIP Cores
System on Chip design resources
System on Chip design resources
July 6, 2026 -
Yokohama, Japan and Milpitas, California --- Socionext Inc., a global leading provider of advanced custom SoCs to the fastest growing segment of the semiconductor market, AI datacenter infrastructure, is announcing the development of a high-performance compute chiplet in TSMC's A14 process technology.
As part of this initiative, Socionext plans to tape out a multi‑core device in September 2026.
This chip will serve as a technology platform to validate CPU and xPU architectures for scalability, on leading‑edge process technology, supporting customer programs in AI hyperscale datacenters and other high-performance, compute‑intensive applications.
The planned device will integrate compute chiplets designed for high-performance, power efficiency, and system scalability. Learnings from this program are targeted at accelerating the development of production SoCs tailored to AI/xPU infrastructure applications.
Socionext's engagement with TSMC builds on the company's long‑standing expertise in leading‑edge silicon design, encompassing multi-core CPU and xPU architectures in advanced process technologies for complex SoCs targeting enterprise and data center applications.
"Driven by increasing AI data center demands, this engagement highlights the strategic importance of advanced compute platforms and our commitment to working closely with customers and ecosystem partners," said Hisato Yoshida, President and COO of Socionext. "By collaborating with TSMC on A14 technology, we are de‑risking leading‑edge product developments and accelerating time‑to‑market for differentiated, high‑performance custom silicon solutions."