July 20, 2026 -
T2M introduces its partner’s latest high-performance 32-bit RISC-V CPU IP core - TAE500, designed for automotive, robotics, industrial control, and high-speed storage applications. The core enables semiconductor companies to build responsive and reliable embedded SoCs, while reducing development complexity and dependence on proprietary processor architectures.
Designed to support ISO 26262 and ASIL-B automotive safety requirements, TAE500 combines real-time processing, advanced memory protection, DSP and floating-point capabilities, and configurable memory architecture. Its 6-stage superscalar pipeline delivers up to 5.79 CoreMark/MHz and 2.55 DMIPS/MHz.
Key Benefits
Target Applications
TAE500 is supplied with a complete development ecosystem, including GCC13/GCC14 toolchains, IDE, SDK, RTOS support, FPGA packages, simulation, debug and trace tools, and technical support.
The core expands T2M’s portfolio of more than 20 RISC-V processor IP cores, covering ultra-low-power MCUs, automotive functional safety, AI acceleration, and high-performance 64-bit computing.
Schedule a meeting with T2M's leadership team at DAC 2026, Long Beach, to explore how our silicon-proven RISC-V IP Cores portfolio can accelerate your next-generation SoC development.
About T2M:
T2M provides a broad portfolio of semiconductor IP Cores, including:
Silicon-Proven IP Cores solutions are available in leading foundries and process nodes, enabling customers to accelerate tape-outs, reduce integration risk, and scale next-gen SoCs. For more information on licensing options and pricing, please drop a request: contact@t-2-m.com