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October 14, 2026 -
New PMIC expands the Rambus family of LPDDR-based server module solutions and builds on the company’s leadership in advanced server-memory power management
SAN JOSE, Calif. — Rambus Inc. (NASDAQ: RMBS), a premier chip and silicon IP provider making data faster and safer, today announced an industry-leading Power Management IC (PMIC) designed to enable low-power, high-performance LPDDR6 Small Outline Compression Attached Memory Modules (SOCAMM2). Developed in technical cooperation with customers and ecosystem partners to support future-generation accelerated AI infrastructure, the PMIC expands the Rambus family of LPDDR-based server module chips and extends Rambus leadership in advanced server memory products.
As AI training and inference workloads scale, the need for higher throughput within a given power envelope, measured in tokens per watt, is a critical consideration for AI infrastructure. This is driving demand for purpose-built memory solutions optimized for power efficiency, form factor and scalability. SOCAMM2 brings the power and performance benefits of LPDDR technology to a compact, modular and serviceable server-memory architecture designed for demanding AI systems. LPDDR6 SOCAMM2, in development now, represents the next important evolution in LPDDR-based server memory technology.
“Inference and agentic AI are driving exciting new opportunities for memory innovation across the data center,” said Rami Sethi, senior vice president and general manager of Memory Interface Chips at Rambus. “Our new PMIC designed for LPDDR6 SOCAMM2 builds on our leadership in server-memory power management. Working closely with industry leaders in alignment with the broader AI ecosystem, we are helping enable the high-performance, power-efficient memory architectures that maximize tokens per watt for AI workloads.”
“As AI systems place growing demands on memory capacity, bandwidth and power efficiency, LPDRAM is becoming an increasingly important technology for next-generation AI infrastructure,” said Praveen Vaidyanathan, vice president and general manager of Cloud Memory Products at Micron Technology. “Micron has helped pioneer low-power memory for the data center and continues to work closely with ecosystem partners to advance industry standards such as SOCAMM2. We welcome Rambus’ continued investment in LPDDR6 power management solutions, which help strengthen the broader low-power memory ecosystem.”
Building on Rambus Server Memory Power Management Leadership
Rambus provides complete memory interface chipsets for DDR- and LPDDR-based memory modules, including registering clock drivers (RCDs), PMICs, voltage regulators, SPD Hubs and temperature sensors. The company continues to advance its memory module chipset roadmaps for high-volume CPU-based servers while expanding its portfolio to address emerging memory architectures for accelerated AI infrastructure.
Rambus offers a complete LPDDR5X SOCAMM2 chipset, which provides the power delivery, configuration and telemetry functions required by the current-generation SOCAMM2. Building on this chipset strategy, the new PMIC, along with the Rambus SPD Hub, extend the LPDDR-based module roadmap to support the evolving requirements of the upcoming LPDDR6 SOCAMM2.
Optimized for the dynamic workload conditions of future AI systems, the PMIC and SPD Hub designed for LPDDR6 SOCAMM2 provide efficient and precise module-level power management, including advanced power conversion, sequencing, telemetry and fault protection. The PMIC efficiently steps down the system voltage supply to the voltage levels needed to power the LPDDR6 DRAM and all other active chips on the module. These capabilities help support the performance, reliability and power efficiency required for next-generation accelerated computing platforms.
Availability
The Rambus PMIC designed for LPDDR6 SOCAMM2 is currently sampling to lead customers.
More Information:
Learn more about the Rambus SOCAMM2 server module chipset at https://www.rambus.com/memory-interface-chips/socamm2-server-chipset/.