Configurable controllers for PCIe 4.0 and CCIX supporting Dual Mode applications
Synopsys Unveils Industry's Broadest Portfolio of Automotive-Grade IP on TSMC's N5A Process Technology
Adopted by Multiple Leading Companies, Synopsys Interface and Foundation IP Enable High Reliability for ADAS SoCs
SUNNYVALE, Calif., Sept. 26, 2023 -- Today Synopsys, Inc. (Nasdaq: SNPS) announced the industry's broadest portfolio of automotive-grade Interface and Foundation IP for TSMC's N5A process. Together, Synopsys and TSMC are helping to power the next generation of software-defined vehicles by enabling long-term reliability and high-performance compute requirements of automotive system-on-chips (SoCs).
"TSMC has worked closely with our design ecosystem partners to provide the automotive semiconductor industry with cutting-edge solutions in IP, EDA, and manufacturing technologies," said Dan Kochpatcharin, head of the Design Infrastructure Management Division at TSMC. "Synopsys' portfolio of automotive-grade IP for TSMC's N5A process enables automotive chip innovators to accelerate the design of their safety-critical SoCs while taking advantage of N5A's significant performance, power efficiency, and logic density boost."
"New generations of automotive SoC designs will need to support massive amounts of safety-critical data processed at extreme speeds and with high reliability," said John Koeter, senior vice president of marketing and strategy for IP at Synopsys. "Synopsys' high-quality, automotive-grade Interface and Foundation IP on TSMC's N5A process enables automotive OEMs, Tier 1s, and semiconductor companies to minimize IP integration risk and help meet the required functional safety, performance, and reliability levels for their SoCs."
Synopsys IP on the TSMC N5A process is designed and tested to the AEC-Q100 reliability and automotive Grade 2 temperature standards for ambient -40°C to 105°C, helping to ensure reliability of advanced driver assistance systems (ADAS), highly automated driving (HAD) systems, and zonal SoCs. The Synopsys IP portfolio meets the ISO 26262 standard for random hardware faults, enabling automotive OEMs, Tier 1s, and semiconductor companies to accelerate the development and assessment of their safety-critical SoCs and reach their designs' functional safety Automotive Safety Integrity Level (ASIL) targets. Automotive-grade Synopsys IP, which has been integrated into more than 100 ADAS chips, is part of Synopsys' automotive SoC and software development offering that includes design, verification, electronics digital twin, and prototyping solutions to accelerate development of chips for software-defined vehicles.
Availability & Additional Resources
- Available today, Synopsys Automotive-Grade IP on the TSMC N5A process includes logic libraries, embedded memories, GPIOs, SLM PVT monitors, and PHYs for LPDDR5X/5/4X, PCIe 4.0/5.0, 10G USXGMII Ethernet, MIPI C-PHY/D-PHY and M-PHY, and USB.
- Web: Accelerate Your Automotive Innovation with Synopsys IP
- White Paper: Confirmation Measures in ISO 26262 Functional Safety Products
About Synopsys
Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As an S&P 500 company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and offers the industry's broadest portfolio of application security testing tools and services. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing more secure, high-quality code, Synopsys has the solutions needed to deliver innovative products. Learn more at www.synopsys.com.
|
Synopsys, Inc. Hot Verification IP
Related News
- Synopsys Accelerates High-Performance Computing SoC Designs with Industry's Broadest IP Portfolio for TSMC's 5nm Process Technology
- Synopsys Advances Designs on TSMC N3E Process with Production-Proven EDA Flows and Broadest IP Portfolio for AI, Mobile and HPC Applications
- Synopsys and TSMC Drive Chip Innovation with Development of Broadest IP Portfolio on TSMC N4P Process
- Synopsys Delivers Automotive-Grade IP in TSMC 7-nm Process for ADAS Designs
- Synopsys Announces Immediate Availability of Broad Portfolio of Interface IP for TSMC's 20SoC Process
Breaking News
- Launching MosChip DigitalSky™ for Building Connected Intelligent Enterprises
- Crypto Quantique collaborates with ADLINK to simplify and enhance device security in industrial PCs
- Xiphera Partners with IPro for the Israeli Chip Design Market
- Siemens collaborates with GlobalFoundries to certify Analog FastSPICE for the foundry's high-performance processes
- EXTOLL collaborates with Frontgrade Technologies for High-Speed SerDes IP
Most Popular
- BrainChip Introduces Lowest-Power AI Acceleration Co-Processor
- Launching MosChip DigitalSky™ for Building Connected Intelligent Enterprises
- Siemens collaborates with GlobalFoundries to certify Analog FastSPICE for the foundry's high-performance processes
- RaiderChip brings Meta Llama 3.2 LLM HW acceleration to low cost FPGAs
- Crypto Quantique collaborates with ADLINK to simplify and enhance device security in industrial PCs
E-mail This Article | Printer-Friendly Page |