Intel and Cadence Expand Partnership to Enable Best-in-Class SoC Design on Intel's Advanced Processes
SANTA CLARA, Calif. & SAN JOSE, Calif.-- February 20, 2024 -- Intel Foundry Services (IFS) and Cadence Design Systems, Inc. (Nasdaq: CDNS) announced they have expanded their partnership and entered into a multiyear strategic agreement to jointly develop a portfolio of key customized IP, optimized design flows and techniques for Intel 18A technology featuring RibbonFET gate-all-around transistors and PowerVia backside power delivery. Joint customers will be able to accelerate their SoC project schedules on process nodes from Intel 18A and beyond while optimizing for performance, power, area, bandwidth and latency for demanding AI, HPC and premium mobile applications.
“We furthered our partnership with Intel Foundry Services through a significant strategic multiyear agreement to provide design software and leading IP at multiple Intel advanced nodes, thereby advancing Intel’s IDM 2.0 strategy and accelerating mutual customer success,” said Anirudh Devgan, president and chief executive officer at Cadence.
“We’re very excited to expand our partnership with Cadence to grow the IP ecosystem for IFS and provide choice for customers,” said Stuart Pann, Intel senior vice president and general manager of IFS. “We will leverage Cadence’s world-class portfolio of leading IP and advanced design solutions to enable our customers to deliver high-volume, high-performance and power-efficient SoCs on Intel’s leading-edge process technologies.”
Fast-growing market segments, such as AI/ML, HPC and premium mobile computing, require the latest standards in IP to take advantage of advanced packaging and silicon process technologies. Cadence’s leading-edge implementations of trailblazing standards, such as advanced memory protocols, PCI Express, UCI Express and others for these key segments, enable joint customers to achieve scalable, high-performance designs that accelerate their time to market in IFS’ most advanced silicon technologies and 3D-IC packaging capabilities.
Building a world-class foundry business is key to Intel’s IDM 2.0 strategy, and this agreement strengthens IFS’ offerings by making an additional portfolio of essential design tools, flows and interface IP available for foundry customers. It builds on Intel’s engagement with other industry-leading IP providers as it continues to grow the IP ecosystem for IFS customers.
About Intel
Intel (Nasdaq: INTC) is an industry leader, creating world-changing technology that enables global progress and enriches lives. Inspired by Moore’s Law, we continuously work to advance the design and manufacturing of semiconductors to help address our customers’ greatest challenges. By embedding intelligence in the cloud, network, edge and every kind of computing device, we unleash the potential of data to transform business and society for the better. To learn more about Intel’s innovations, go to newsroom.intel.com and intel.com.
About Cadence
Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications, including consumer, hyperscale computing, 5G communications, automotive, mobile, aerospace, industrial and healthcare. For nine years in a row, Fortune magazine has named Cadence one of the 100 Best Companies to Work For. Learn more at cadence.com.
|
Cadence Hot IP
Related News
- M31 Promotes Advanced SoC Development and Innovation at Intel Foundry's Direct Connect Event
- Flex Logix Joins Intel Foundry Services Accelerator IP Alliance to Enable Fast, Low Power, Reconfigurable SoC's
- Intel and Synopsys Expand Partnership to Enable Leading IP on Intel Advanced Process Nodes
- Cadence Timing Signoff Tools Enable MaxLinear to Deliver Industry's First 400Gbps PAM4 SoC on 16FF Process
- Cadence Methodology Powers Samsung Electronics' Advanced SOC Design Environments
Breaking News
- Thalia's AMALIA 24.2 introduces pioneering estimated parasitics feature to reduce PEX iterations by at least 30%
- TSMC plans 1.6nm process for 2026
- Qualitas Semiconductor Partners with TUV Rheinland Korea to Enhance ISO 26262 Functional Safety Management System
- M31 has successfully launched MIPI C/D PHY Combo IP on the advanced TSMC 5nm process
- Ceva multi-protocol wireless IP could simplify IoT MCU and SoC development
Most Popular
- Controversial former Arm China CEO founds RISC-V chip startup
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- Credo at TSMC 2024 North America Technology Symposium
- Synopsys Accelerates Next-Level Chip Innovation on TSMC Advanced Processes
- Kalray Joins Arm Total Design, Extending Collaboration with Arm on Accelerated AI Processing
E-mail This Article | Printer-Friendly Page |