sureCore announces low power memory compiler for 16nm FinFET
Ushers in a new paradigm for power critical applications
Sheffield, UK – April 4, 2024 -- The mature FinFET nodes are rapidly becoming an interesting option for companies focused on low power applications like wearables, IoT and medical. With an attractive combination of performance, density and yield, these nodes can deliver some very compelling trade-offs, in particular cutting operating voltages to deliver substantial power savings whilst still delivering the requisite performance metrics. With 16nm now having been in production for over ten years, not only have the foundries ironed out manufacturing issues, but the tooling is now also largely depreciated meaning that a technology that was once the heralded solution for the demands of the HPC and mobile sectors has now become cost competitive for developers of power sensitive devices.
SoC developers with low power solutions implemented in 28 or 22nm bulk or FDSOI nodes are now facing traditional commercial pressures to cut ASPs and deliver improved feature sets and power envelopes. However, as outlined above, these FinFET nodes were engineered to deliver performance first and foremost hence much of the IP that is available for these nodes is similarly optimised.
However, sureCore, the low power embedded memory specialist, has announced the availability of its PowerMiser, ultra-low, dynamic power memory compiler in 16nm. This will enable developers to more easily hit their challenging power budgets and successfully exploit the capabilities of these mature FinFET processes.
Paul Wells, sureCore’s CEO, explained, “FinFET was developed to address the increasingly poor leakage characteristics of bulk nodes. In addition, the key driver for the mobile sector was ever greater performance to deliver new features and a better user experience. The power consumption was not deemed a significant issue, as both the radio and the display were the dominant factors in battery life determination. This, in addition, to the relatively large form factor of a mobile phone meant that the batteries had capacities in excess of 3-4000mAh. However, designers of power sensitive applications such as wearables and medical devices with much more constrained form factors and hence smaller batteries need a range of power optimised IP that can exploit the power advantages of FinFET whilst being much less concerned about performance. This has meant a demand for memory solutions that are specifically tailored to deliver much reduced power consumption. By providing the PowerMiser SRAM IP, sureCore is enabling the shift to mature FinFET processes for low power applications and is thus helping to provide clear differentiation for such products based on both cost and battery life. By doing so, the all-important competitive advantage over rivals may be realised.”
sureCore -- When low power is paramount
sureCore, the ultra-low power, embedded memory specialist, is the low-power innovator who empowers the IC design community to meet aggressive power budgets through a portfolio of ultra-low power memory design services and standard IP products. sureCore’s low-power engineering methodologies and design flows meet the most exacting memory requirements with a comprehensive product and design services portfolio that create clear market differentiation for customers. The company’s low-power product line encompasses a range of close to near-threshold, silicon proven, process-independent SRAM IP.
|
Related News
- sureCore Opens Low Power Memory Compiler Access
- SureCore announces low power cryogenic memory technology that could help dramatically cut data centre power usage
- CEO interview: Paul Wells of SureCore on low power memory and China
- Surecore's Low Power Memory Delivers Improved Power Efficiency For BLE-Enabled Devices
- Innopower First to Deliver Complete Memory Compiler and Miniaturized Cell Library, miniLib+, for 55nm LP(Low Power) process
Breaking News
- Silicon industry veteran Oreste Donzella joins Sondrel board as Non-Executive Director
- Powering the NVM and Embedded Chip Security Technologies
- BOS and Tenstorrent Unveil Eagle-N, Industry's First Automotive AI Accelerator Chiplet SoC
- BBright Expands Ultra HD Capabilities with intoPIX JPEG XS Technology in its V2.2 Decoder Platform
- Jmem Tek and Andes Technology Partner on the World' s First Quantum-Secure RISC-V Chip
Most Popular
- MosChip selects Cadence tools for the design of HPC Processor “AUM” for C-DAC
- Cadence and Rapidus Collaborate on Leading-Edge 2nm Semiconductor Solutions for AI and HPC Applications
- Quobly announces key milestone for fault-tolerant quantum computing
- Synopsys Announces Industry's First Ultra Ethernet and UALink IP Solutions to Connect Massive AI Accelerator Clusters
- Alphawave IP - Announcement regarding leadership transition
E-mail This Article | Printer-Friendly Page |