Apr. 21, 2025 –
Novel Power Management such as LDO, Droop Detector, Low-Jitter and Pinless Clocking and High-Accuracy PVT Sensor IP’s
Highlights of the Demos
Sunnyvale, CA, April 21, 2025 – Analog Bits (www.analogbits.com), the industry’s leading provider of low-power mixed-signal IP (Intellectual Property) solutions will be demonstrating its newest LDO, power supply droop detectors, embedded clock LC PLL’s on the TSMC N3P process, and clocking, high-accuracy PVT and droop detectors on the TSMC N2P process at the Analog Bits booth at the TSMC 2025 North America Technology Symposium in Santa Clara, California. This demonstration will showcase Analog Bits’ industry-leading portfolio of Mixed-Signal IP in TSMC’s advanced 5nm, 3nm, and 2nm processes.
“Analog Bits is pleased to be an early partner qualifying IPs on TSMC’s N3P and N2P testchips enabling a complete power performance architecture for our customers,” said Mahesh Tirupattur, CEO at Analog Bits. “Whether you are designing advanced datacenters, AI/ML applications, or automotive SoC’s managing power is not an after-thought, it has to be done right at the architectural phase. We have collaborated and trailblazed on our IP development with advanced customers to pre-qualify novel power management IP’s such as LDO, Droop Detectors, and high-accuracy sensors along with our sophisticated PLL’s for low jitter. Come and see our latest demos and also sample Analog Bits 2024 holiday wine at our booth.”
When April 23rd, 2025
Register at: https://pr.tsmc.com/english/events/tsmc-events
Location Santa Clara Convention Center, Booth #716
The company will also be participating in other locations of the TSMC Technology Symposium around the world.
Analog Bits, Inc. is the leading supplier of a broad portfolio of mixed-signal IP with a reputation for easy and reliable integration into advanced SoCs. Our products include precision clocking macros, power and temperature sensors including LDO and regulators, programmable interconnect solutions such as multi-rate SERDES and programmable I/O’s. With billions of IP cores fabricated in customer silicon, from 0.35 micron to 2nm processes, Analog Bits has an outstanding heritage of first-time-working IP’s that lower risk.