Company
design-reuse.com
D&R China
Blogs
Industry Articles
D&R Events
IP-SoC Days 2025
IP-SoC Days 2024
IP-SoC Days 2023
IP-SoC Days 2022
IP-SoC Days 2021
IP-SoC 2024
IP-SoC 2023
IP-SoC 2022
IP-SoC 2021
Subscribe to D&R SoC News Alert
English
Mandarin
Register
Login
Menu
Home
Search IP Core
News
Blogs
Articles
D&R Events
Subscribe to D&R SoC News Alert
Register
Login
News
Center
Foundation IP
Analog IP
Interface IP
Interconnect IP
Memory Controller
Peripheral Controller
Wireless IP
Wireline IP
Processor IP
RISC-V
AI Core
Automotive IP
Security IP
IoT
Media IP
Avionics / Space IP
Verification IP
Verification Platform
Asic & IP Design Center
IP-SoC Days
IP-SoC Days 2025
IP-SoC Days 2024
IP-SoC Days 2023
IP-SoC Days 2022
IP-SoC Days 2021
IP-SoC 2024
IP-SoC 2023
IP-SoC 2022
IP-SoC 2021
Browse Interface Controller & PHY
AMBA AHB / APB/ AXI (198)
CXL (18)
D2D (58)
Gen-Z (6)
HDMI (82)
I2C (119)
Interlaken (3)
MIL-STD-1553 (3)
MIPI (458)
Multi-Protocol PHY (36)
PCI (248)
RapidIO (6)
SAS (6)
SATA (95)
Smart Card (6)
USB (388)
V-by-One (22)
VESA (74)
Other (65)
AMBA AHB / APB (174)
AMBA AXI (24)
Bunch of Wires (2)
UCIe (32)
Ultralink (6)
Other (18)
MIPI C-PHY (4)
MIPI C-PHY/D-PHY Combo (26)
MIPI Controller (81)
MIPI CSI-2 (6)
MIPI CSI-4 (1)
MIPI CSI-5 (1)
MIPI D-PHY (84)
MIPI DSI (6)
MIPI HSI (1)
MIPI I3C (5)
MIPI LLI (1)
MIPI M-PHY (11)
MIPI PHY (221)
MIPI RFFE (3)
MIPI SLIMbus (2)
MIPI SPMI (3)
MIPI UniPro (2)
SAS Controller (5)
SAS SerDes/PHY (1)
DisplayPort (45)
VESA DSC (20)
VESA VDC-M (9)
You must be registered with the D&R website to view the full search results, including:
Complete datasheets for
IP Core
products
Contact information for
IP Core
suppliers
Please
log in
here to your account.
New user ?
Signup here
.
248 IP
101
3.0
Single Lane and Quad Lane 8Gbps PCIe3.0 PHY IP in TSMC 28HPC process
TERMINUS CIRCUITS PCIe GEN3.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol an...
102
3.0
Single Lane and Quad Lane 8Gbps PCIe3.0 PHY IP in TSMC 65G process
TERMINUS CIRCUITS PCIe GEN3.0 PHY is high performance, low power, low latency Single & Quad-Lane PCI Express PHY that supports PCI Express protocol an...
103
1.0
64G/56G SerDes
The Innosilicon 64G/56G SERDES PHY is a highly configurable PHY capable of supporting speeds up to 56Gbps within a single lane. For this datasheet, th...
104
1.0
PCIe 2.0 End Point IP Core - PCIe with FIFO Interface
The Arasan PCI Express End Point is a high-speed, high-performance, and lowpowerIP core that is fully compliant to the PCI Express Specification 1.1 a...
105
1.0
PCIe2.0 PHY & Controller
The Innosilicon SERDES PHY is a highly configurable PHY capable of supporting speeds up to 25Gbps within a single lane. For this particular datasheet,...
106
1.0
PCIe2.1 PHY
The Innosilicon SERDES PHY is a highly configurable PHY capable of supporting speeds up to 25Gbps within a single lane. For this particular datasheet,...
107
1.0
PCIe3.0 Controller
The Innosilicon Gen1/2/3 PCI Express Controller provides a PCI Express Root Complex (RC) and Endpoint (EP) application. It’s a high performance, high ...
108
1.0
PCIe3.0 PHY
The Innosilicon PCIe3.0 PHY is a highly configurable PHY capable of supporting speeds up to 8Gbps within a single lane. For this particular datasheet,...
109
1.0
PCIe4.0 Controller
The Innosilicon Gen1/2/3/4 PCI Express Controller provides a PCI Express Root Complex (RC) and Endpoint (EP) application. It’s a high performance, hig...
110
1.0
PCIe4.0 PHY
The Innosilicon PCIe4.0 PHY is a highly configurable PHY capable of supporting speeds up to 16Gbps within a single lane. For this particular datasheet...
111
1.0
PCIe4/3/2/1 PHY & Controller
The Innosilicon PCIe4.0 PHY is a highly configurable PHY capable of supporting speeds up to 16Gbps within a single lane. For this particular datasheet...
112
1.0
PCIe5.0 PHY & Controller
The Innosilicon Gen1/2/3/4/5 PCI Express Controller provides a PCI Express Root Complex (RC) and Endpoint (EP) application. It’s a high performance, h...
113
1.0
JESD204B Controller
JESD204B is a standardized serial interface for communication between logic devices (ASIC or FPGA) and converters (ADC or DAC). Innosilicon’s JESD204B...
114
1.0
JESD204B PHY & Controller
JESD204B is a standardized serial interface for communication between logic devices (ASIC or FPGA) and converters (ADC or DAC). Innosilicon’s JESD204B...
115
1.0
5G Multi-SerDes For PCIe2.0/USB3.0 PHY
The Innosilicon 5Gbps SERDES PHY is a highly configurable PHY capable of supporting speeds up to 5Gbps within a single lane. For this datasheet, the P...
116
1.0
8G Multi-SerDes For PCIe3.0/USB3.0 PHY
The Innosilicon 8Gbps SERDES PHY is a highly configurable PHY capable of supporting speeds up to 8Gbps within a single lane. For this datasheet, the P...
117
1.0
SGMII PHY
The Innosilicon SGMII PHY is a highly programmable module that processes high-speed serial data to parallel data compatible with the IEEE802.3 1000BAS...
118
1.0
SMIC 0.13um 1.2V/3.3V PCI I/O Cells Library
VeriSilicon SMIC 0.13um 1.2V/3.3V PCI I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporation...
119
1.0
SMIC 0.18um PCI I/O Cells DUP Library
VeriSilicon SMIC 0.18um 1.8V/3.3V PCI I/O Cells Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporatio...
120
1.0
SMIC 0.18um PCI I/O Cells Library
VeriSilicon SMIC 0.18um 1.8V/3.3V PCI I/O Cells Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporatio...
121
1.0
SMIC 0.18um PCI-X IO
The PCI-X transceiver is a IP version of PCI-X I/O pads, which is fully compatible with PCI-X R1.0 specification....
122
1.0
SMIC 0.25um 2.5V/3.3V PCI I/O Cells Library
VeriSilicon SMIC 0.25um 2.5V/3.3V PCI I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporation...
123
1.0
GSMC 0.15um 1.2V/3.3V PCI I/O Cells
VeriSilicon GSMC 0.15um 1.2V/3.3V PCI I/O Cell Library developed by VeriSilicon is optimized for Grace Semiconductor Manufacturing Corporation (GSMC) ...
124
1.0
GSMC 0.18um PCI I/O Cells Library
VeriSilicon GSMC 0.18um 1.8V/3.3V PCI I/O Cells Library developed by VeriSilicon is optimized for Grace Semiconductor Manufacturing Corporation (GSMC)...
125
1.0
GSMC 0.25um 2.5V/3.3V PCI I/O Cell Library
VeriSilicon GSMC 0.25um 2.5V/3.3V PCI I/O Cell Library developed by VeriSilicon is optimized for Grace Semiconductor Manufacturing Corporation (GSMC) ...
126
1.0
GSMC0.18um PCI I/O Cells DUP Library
VeriSilicon GSMC 0.18um 1.8V/3.3V PCI I/O Cells Library developed by VeriSilicon is optimized for Grace Semiconductor Manufacturing Corporation (GSMC)...
127
0.3729
PCI/PCIX Interface 1.8V Oxide Device- TSMC 22nm 22ULP,ULL
Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, S...
128
0.3729
PCI/PCIX Interface 1.8V Oxide Device - TSMC 28nm 28HP, 28LP, 28ULP, 28HPL, 28HPC, 28HPC+, 28HPM
Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, S...
129
0.3729
PCI/PCIX Interface 2.5V Device - TSMC 28nm 28HP (CLN28HP)
Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, S...
130
0.3729
PCI/PCIX Interface 2.5V Device - TSMC 40nm 40G (CLN40G)
Dolphin's hardened DDR2/3/4 SDRAM PHY and LPDDR2/3 SDRAM PHY IP is a silicon-proven, Combo PHY supporting speeds up to 2133 Mbps. It is fully complian...
131
0.3729
PCI/PCIX Interface 2.5V Device - TSMC 40nm 40LP (CLN40lp)
Dolphin's hardened DDR2/3/4 SDRAM PHY and LPDDR2/3 SDRAM PHY IP is a silicon-proven, Combo PHY supporting speeds up to 2133 Mbps. It is fully complian...
132
0.118
PCI Express Gen2 PHY IP, PCIe Gen-2, 1 Lanes, UMC 55nm SP process
PCIE Gen.II, UMC 55nm SP/RVT Low-K Logic process....
133
0.118
PCI Express Gen2 PHY IP, PCIe Gen-2, 1 Lanes, UMC 90nm SP process
PCI-Express II PHY, UMC 90nm SP/RVT Low-K process....
134
0.118
PCI Express Gen2 PHY IP, PCIe Gen-2, 4 Lanes, UMC 90nm SP process
4x lane PCI Express Gen II PHY, UMC 90nm SP/RVT Low-K Logic process....
135
0.118
PCI Express PHY IP, PCIe Gen-1, 1 Lanes, UMC 0.13um HS/FSG process
PCI-Express PHY with PIPE interface, 1 lane PCI-E PHY with Low Power feature, UMC 0.13um HS/FSG Logic process....
136
0.118
PCI Express PHY IP, PCIe Gen-1, 1 Lanes, UMC 0.18um G2 process
PCI-Express PHY with PIPE interface, 1 lane PCI-E PHY, UMC 0.18um GII Logic (RVT) process....
137
0.118
PCI Express PHY IP, PCIe Gen-1, 1 Lanes, UMC 0.18um G2 process
PCI-Express PHY with PIPE interface, 1 lane PCI-E PHY, UMC 0.18um GII Logic (RVT) process....
138
0.118
PCI-X Controller IP, PCIX 1.0b, Soft IP
PCI-X 1.0b device/host bridge controller....
139
0.118
PCIe Controller IP, PCIe Gen-2 with the AHB interface, x1 Lanes, Soft IP
PCI Express Gen 2 Endpoint Controller. Support single-function, virtual channel and single lane....
140
0.118
PCIe Controller IP, PCIe Gen-2 with the AXI interface, x4 Lanes, Soft IP
PCIe Gen2 x4 Lane Endpoint Controller....
141
0.118
PCIE Gen.II PHY; UMC 65nm LP/RVT LowK Logic Process.
PCIE Gen.II PHY; UMC 65nm LP/RVT LowK Logic Process....
142
0.118
PCIe Gen4 x8 Lane Endpoint Controller
PCIe Gen4 x8 Lane Endpoint Controller...
143
0.118
The PCIe Gen3 PCS for 28nm programmable serdes.
The PCIe Gen3 PCS for 28nm programmable serdes....
144
0.0
6.25G SerDes in 55nm
The Actt's 6.25G SerDes IP is a 4-Channel Serdes configuration with 1 PLL, 4 TX channels and 4 RX channels. It’s based on SMIC 55nm embedded-flash tec...
145
0.0
32-bit, 33 MHz Multifunction Target Interface
The PCI-T32MF implements a target-only PCI interface compliant with the PCI 2.3 specification. It supports a 32-bit address/data bus and operates up t...
146
0.0
32-bit, 33 MHz PCI Target Interface Core
The main PCI-T32 Interface core purpose is to isolate the user from having to solve complex problems of the PCI interface implementation and let the u...
147
0.0
32-bit/33,66Mhz PCI Host Bridge
...
148
0.0
12.5G Serdes in SMIC 40NLL
Brite Semiconductor‘s Serdes provides 2.5-32Gbps multi-rate SERDES IP which is designed for smooth integration of Multiple SERDES lanes demonstrate go...
149
0.0
12G Multiprotocol Serdes IP, Silicon Proven in SMIC 14SF+
The multi-protocol SerDes PHY consist of Peripheral Component Interconnect Express (PCIe) compliant with PCIe 2.0 Base Specification with support of P...
150
0.0
16G Multiproocol Serdes IP, Silicon Proven in TSMC 28HPC+
The multi protocol SerDes PHY consist of Peripheral Component Interconnect Express (PCIe) compliant with PCIe 4.0, 3.0, 2.0 Base Specification with su...
|
Previous
|
3
|
4
|
5
|
Next
|
